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S25FL128K Datasheet, PDF (54/59 Pages) SPANSION – 128-Mbit CMOS 3.0 Volt Flash Memory with 104-MHz SPI (Serial Peripheral Interface) Multi I/O Bus
Data Sheet (Preliminary)
7.5 AC Measurement Conditions
Parameter
Symbol
Load Capacitance
Input Rise and Fall Times
Input Pulse Voltages
Input Timing Reference Voltages
Output Timing Reference Voltages
CL
TR, TF
VIN
IN
OUT
Note:
1. Output Hi-Z is defined as the point where data out is no longer driven.
Spec
Min
Max
30
5
0.2 VCC to 0.8 VCC
0.3 VCC to 0.7 VCC
0.5 VCC to 0.5 VCC
Unit
pF
ns
V
V
V
Figure 7.2 AC Measurement I/O Waveform
Input Levels
0.8 VCC
Input and Output
Timing Reference Levels
0.5 VCC
0.2 VCC
7.6 AC Electrical Characteristics
Description
Symbol
Spec
Alt
Min
Typ
Max
Clock frequency for Dual I/O & Quad SPI Instructions
FR
fC
D.C.
70
Clock frequency for all Single SPI, Dual Output
Instructions except Read Data (03h)
FR
fC
D.C.
104
Clock frequency for Read Data instruction (03h)
fR
D.C.
33
Clock High, Low Time for all Quad SPI instructions
tCLH1, tCLL1 (1)
6
Clock High, Low Time for Single/Dual instructions except
Read Data (03h)
tCLH1, tCLL1 (1)
4
Clock High, Low Time for Read Data (03h) instruction tCRLH, tCRLL (1)
8
Clock Rise Time peak to peak
tCLCH (2)
0.1
Clock Fall Time peak to peak
tCHCL (2)
0.1
CS# Active Setup Time relative to CLK
tSLCH
tCSS
5
CS# Not Active Hold Time relative to CLK
tCHSL
5
Data In Setup Time
tDVCH
tDSU
2
Data In Hold Time
tCHDX
tDH
5
CS# Active Hold Time relative to CLK
tCHSH
5
CS# Not Active Setup Time relative to CLK
tSHCH
5
CS# Deselect Time (for Array Read -> Array Read)
tSHSL1
tCSH
10
CS# Deselect Time (for Erase or Program -> Read
Status Registers)
Volatile Status Register Write Time
tSHSL2
50
tCSH
50
Output Disable Time
Clock Low to Output Valid 2.7V-3.6V / 3.0V-3.6V
Clock Low to Output Valid (for Read ID instructions)
2.7V-3.6V / 3.0V-3.6V
tSHQZ (2)
tDIS
tCLQV1
tV1
tCLQV2
tV2
7
7/6
8.5 / 7.5
Unit
MHz
MHz
MHz
ns
ns
ns
V/ns
V/ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
54
S25FL128K
S25FL128K_00_02 April 1, 2011