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AM49LV6408M Datasheet, PDF (42/63 Pages) SPANSION – Stacked Multi-chip Package (MCP) 64 Mbit (4 M x 16 bit) Flash Memory and 8 Mbit (512K x 16-Bit)
ADVANCE INFORMATION
PSEUDO SRAM DC AND
OPERATING CHARACTERISTICS
Parameter
Symbol
Parameter Description
Test Conditions
Min
Typ
Max Unit
ILI
Input Leakage Current
ILO
Output Leakage Current
ICC1s Average Operating Current
ICC2s Average Operating Current
VIL
Input Low Voltage
VIN = VSS to VCC
–1.0
CE1#s = VIH, CE2s = VIL or OE# =
VIH or WE# = VIL, VIO= VSS to VCC
–1.0
Cycle time = 1 µs, 100% duty,
IIO = 0 mA, CE1#s ≤ 0.2 V,
CE2 ≥ VCC – 0.2 V, VIN ≤ 0.2 V or
3
VIN ≥ VCC – 0.2 V
Cycle time = Min., IIO = 0 mA,
100% duty, CE1#s = VIL, CE2s =
12
VIH, VIN = VIL = or VIH
–0.2
(Note 3)
1.0
µA
1.0
µA
5
mA
25
mA
0.4
V
VIH
Input High Voltage
2.2
VCC+0.2
(Note 2)
V
VOL
Output Low Voltage
IOL = 2.0 mA
VOH Output High Voltage
IOH = –1.0 mA
2.2
ISB
Standby Current (TTL)
CE1#s = VIH, CE2 = VIL, Other
inputs = VIH or VIL
ISB1
Standby Current (CMOS)
CE1#s=VIH, CE2= VIL:
Other inputs = VIH or VIL:
tA = 85°C, VCC = 3.0 V
ISB2
Standby Current (CMOS)
CE1#s=VIH, CE2= VIL:
Other inputs = VIH or VIL:
tA = 85°C, VCC = 3.3 V
Notes:
1. TA= –40° to 85°C, otherwise specified.
2. Overshoot: VCC+1.0V if pulse width ≤ 20 ns.
3. Undershoot: –1.0V if pulse width ≤ 20 ns.
4. Overshoot and undershoot are sampled, not 100% tested.
5. Stable power supply required 200 µs before device operation.
0.4
V
V
0.3
mA
60
µA
85
µA
40
Am49LV6408M
November 5, 2003