AM29LV400BT-90EC Datasheet, PDF (41/48 Pages) SPANSION – 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory

DATA SHEET
ERASE AND PROGRAMMING PERFORMANCE
Parameter
Sector Erase Time
Chip Erase Time
Byte Programming Time
Word Programming Time
Chip Programming Time
(Note 3)
Byte Mode
Word Mode
Typ (Note 1)
0.7
11
9
11
4.5
2.9
Max (Note 2)
15
300
360
13.5
8.7
Unit
Comments
s
Excludes 00h programming
s
prior to erasure (Note 4)
µs
µs
Excludes system level overhead
s
(Note 5)
s
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V V_CC, 1,000,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90°C, V_CC = 2.7 V (3.0 V for regulated speed options), 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table 5
for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
LATCHUP CHARACTERISTICS
Description
Input voltage with respect to V_SS on all pins except I/O pins
(including A9, OE#, and RESET#)
Input voltage with respect to V_SS on all I/O pins
V_CC Current
Includes all pins except V_CC. Test conditions: V_CC = 3.0 V, one pin at a time.
Min
–1.0 V
–1.0 V
–100 mA
Max
12.5 V
V_CC + 1.0 V
+100 mA
TSOP AND SO PIN CAPACITANCE
Parameter
Symbol
Parameter Description
C_IN
C_OUT
C_IN2
Input Capacitance
Output Capacitance
Control Pin Capacitance
Notes:
1. Sampled, not 100% tested.
2. Test conditions T_A = 25°C, f = 1.0 MHz.
Test Setup
V_IN = 0
V_OUT = 0
V_IN = 0
Typ Max Unit
6
7.5
pF
8.5
12
pF
7.5
9
pF
December 4, 2006 21523D4
Am29LV400B
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