S29GL01GP11TFIR20 Datasheet, PDF (36/81 Pages) SPANSION – 1 Gigabit, 512 Megabit, 256 Megabit and 128 Megabit 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology

Data Sheet
Cycle
1
2
Table 7.15 Unlock Bypass Program
(LLD Function = lld_UnlockBypassProgramCmd)
Description
Program Setup
Program Command
Operation
Write
Write
Byte Address
Base + XXXh
Program Address
Word Address
Base + XXXh
Program Address
Data
00A0h
Program Data
/* Example: Unlock Bypass Program Command */
/* Do while in Unlock Bypass Entry Mode! */
*( (UINT16 *)base_addr ) = 0x00A0; /* write program setup command
*/
*( (UINT16 *)pa )
= data;
/* write data to be programmed
*/
/* Poll until done or error. */
/* If done and more to program, */
/* do above two cycles again. */
Cycle
1
2
Description
Reset Cycle 1
Reset Cycle 2
Table 7.16 Unlock Bypass Reset
(LLD Function = lld_UnlockBypassResetCmd)
Operation
Write
Write
Byte Address
Base + XXXh
Base + XXXh
Word Address
Base + XXXh
Base + XXXh
Data
0090h
0000h
/* Example: Unlock Bypass Exit Command */
*( (UINT16 *)base_addr ) = 0x0090;
*( (UINT16 *)base_addr ) = 0x0000;
7.8 Write Operation Status
The device provides several bits to determine the status of a program or erase operation. The following
subsections describe the function of DQ1, DQ2, DQ3, DQ5, DQ6, and DQ7.
7.8.1
DQ7: Data# Polling
The Data# Polling bit, DQ7, indicates to the host system whether an Embedded Program or Erase algorithm
is in progress or completed, or whether the device is in Erase Suspend. Data# Polling is valid after the rising
edge of the final WE# pulse in the command sequence. Note that the Data# Polling is valid only for the last
word being programmed in the write-buffer-page during Write Buffer Programming. Reading Data# Polling
status on any word other than the last word to be programmed in the write-buffer-page returns false status
information.
During the Embedded Program algorithm, the device outputs on DQ7 the complement of the datum
programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend. When the
Embedded Program algorithm is complete, the device outputs the datum programmed to DQ7. The system
must provide the program address to read valid status information on DQ7. If a program address falls within a
protected sector, Data# polling on DQ7 is active, then that sector returns to the read mode.
During the Embedded Erase Algorithm, Data# polling produces a “0” on DQ7. When the Embedded Erase
algorithm is complete, or if the device enters the Erase Suspend mode, Data# Polling produces a “1” on DQ7.
The system must provide an address within any of the sectors selected for erasure to read valid status
information on DQ7.
After an erase command sequence is written, if all sectors selected for erasing are protected, Data# Polling
on DQ7 is active for approximately 100 µs, then the device returns to the read mode. If not all selected
sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the
selected sectors that are protected. However, if the system reads DQ7 at an address within a protected
sector, the status may not be valid.
Just prior to the completion of an Embedded Program or Erase operation, DQ7 may change asynchronously
with DQ6-DQ0 while Output Enable (OE#) is asserted low. That is, the device may change from providing
status information to valid data on DQ7. Depending on when the system samples the DQ7 output, it may read
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S29GL-P MirrorBit^® Flash Family
S29GL-P_00_A14 October 22, 2012