S29GL01GP13FFIV20 Datasheet, PDF (19/81 Pages) SPANSION – 1 Gigabit, 512 Megabit, 256 Megabit and 128 Megabit 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology

Data Sheet
Table 6.4 S29GL128P Sector & Memory Address Map
Uniform Sector
Size
64 Kword/
128 Kbyte
Sector
Count
128
Sector
Range
SA00
:
SA127
Address Range (16-bit)
0000000h - 000FFFFh
:
07F0000 - 7FFFFF
Notes
Sector Starting Address
Sector Ending Address
Note
This table has been condensed to show sector-related information for an entire device on a single page. Sectors and their address ranges
that are not explicitly listed (such as SA001-SA510) have sector starting and ending addresses that form the same pattern as all other
sectors of that size. For example, all 128 Kb sectors have the pattern xxx0000h-xxxFFFFh.
7. Device Operations
This section describes the read, program, erase, handshaking, and reset features of the Flash devices.
Operations are initiated by writing specific commands or a sequence with specific address and data patterns
into the command registers (see Table 12.1 through Table 12.4). The command register itself does not
occupy any addressable memory location; rather, it is composed of latches that store the commands, along
with the address and data information needed to execute the command. The contents of the register serve as
input to the internal state machine and the state machine outputs dictate the function of the device. Writing
incorrect address and data values or writing them in an improper sequence may place the device in an
unknown state, in which case the system must pull the RESET# pin low or power cycle the device to return
the device to the reading array data mode.
7.1 Device Operation Table
The device must be setup appropriately for each operation. Table 7.1 describes the required state of each
control pin for any particular operation.
Table 7.1 Device Operations
Operation
Read
Write (Program/Erase)
Accelerated Program
Standby
Output Disable
Reset
CE#
OE#
L
L
L
H
L
H
V_CC ± 0.3 V X
L
H
X
X
WE# RESET# WP#/ACC
H
H
X
L
H
(Note 2)
L
H
V_HH
X V_CC ± 0.3 V
H
H
H
X
X
L
X
Addresses
(Note 1)
A_IN
A_IN
A_IN
X
X
X
DQ0–DQ7
D_OUT
(Note 3)
(Note 3)
High-Z
High-Z
High-Z
DQ8–DQ15
BYTE#= V_IH
D_OUT
(Note 3)
(Note 3)
BYTE#= V_IL
DQ8–DQ14
= High-Z,
DQ15 = A-1
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Legend
L = Logic Low = V_IL, H = Logic High = V_IH, V_HH = 11.5–12.5V, X = Don’t Care, A_IN = Address In, D_IN = Data In, D_OUT = Data Out
Notes
1. Addresses are AMax:A0 in word mode; A_Max:A-1 in byte mode.
2. If WP# = V_IL, on the outermost sector remains protected. If WP# = V_IH, the outermost sector is unprotected. WP# has an internal pull-up; when unconnected,
WP# is at V_IH. All sectors are unprotected when shipped from the factory (The Secured Silicon Sector can be factory protected depending on version ordered.)
3. D_IN or D_OUT as required by command sequence, data polling, or sector protect algorithm.
October 22, 2012 S29GL-P_00_A14
S29GL-P MirrorBit^® Flash Family
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