AM29BDS640G Datasheet, PDF (12/78 Pages) SPANSION – 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory

Preliminary
Input/Output Descriptions
A21-A0
=
DQ15-DQ0
=
CE#
=
OE#
=
WE#
=
V_CC
=
V_IO
=
V_SS
=
V_SSIO
=
NC
=
RDY
=
CLK
=
AVD#
=
RESET#
=
WP#
=
ACC
=
Logic Symbol
Address inputs
Data input/output
Chip Enable input. Asynchronous relative to CLK for
the Burst mode.
Output Enable input. Asynchronous relative to CLK
for the Burst mode.
Write Enable input.
Device Power Supply
(1.65 – 1.95 V).
Input & Output Buffer Power Supply (either 1.65 –
1.95 V or 2.7 – 3.15 V).
Ground
Output Buffer Ground
No Connect; not connected internally
Ready output; indicates the status of the Burst read.
Low = data not valid at expected time. High = data
valid.
CLK is not required in asynchronous mode. In burst
mode, after the initial word is output, subsequent
active edges of CLK increment the internal address
counter.
Address Valid input. Indicates to device that the valid
address is present on the address inputs (A21–A0).
Low = for asynchronous mode, indicates valid
address; for burst mode, causes starting address to
be latched.
High = device ignores address inputs
Hardware reset input. Low = device resets and
returns to reading array data
Hardware write protect input. At V_IL, disables
program and erase functions in the two outermost
sectors. Should be at V_IH for all other conditions.
At V_ID, accelerates programming; automatically
places device in unlock bypass mode. At V_IL, locks all
sectors. Should be at V_IH for all other conditions.
22
A21–A0
16
CLK
DQ15–DQ0
WP#
ACC
CE#
OE#
WE#
RESET#
RDY
AVD#
10
Am29BDS640G
25903C1 October 1, 2003