FAM-70X1S-T40 Datasheet, PDF (5/14 Pages) Source Photonics, Inc. – OC-192/STM-64 SFF Transponder

OC-192/STM-64 Transponder
40/80km transmission
July 10, 2005
Electrical Interface Characteristics
Table 4 - LVDS Input/Output Specification
Parameter
Symbol
LVDS interface
Input Differential Voltage
V_ID
Input Differential impedance
R_ID
Output Differential Voltage
V_OD
Output Common Mode Voltage
V_CMO
Output Differential impedance
R_OD
Rise Time/Fall time
T_rise/fall
Clock Signal Duty Cycle
Min. Typical
200
80
100
500
80
100
45
50
VP
Differantial
Voltage
(V_OD or V_ID)
VN
Definition of Differantial Voltage Levels
Max.
Unit
mV
120
Ω
1000
mV
120
Ω
250
ps
55
%
Common Mode
Voltage
(V_CMI or V_CMD)
Notes
Table 5 - Input Reference Clocks
Parameter
Input Differential Voltage
Differential Input Impedance
Clock signal Duty Cycle
Symbol
V_ID
R_ID
Tw/To
Min.
400
80
45
Typical
100
Max.
1800
120
55
Unit
mV
Ω
%
Notes
Table 6 - LVTTL Input/Output Pin Characteristics
Parameter
Symbol Min.
Input High Voltage
2.0
Input Low Voltage
GND
Output High Voltage
2.4
Output Low Voltage
GND
Typical
Max.
Vdd
0.8
Vdd
0.4
Unit
V
V
V
V
Notes
Transponder Clock Interfaces and Control
There are seven clock interfaces to the transponder. This section details the specific functions, capabilities,
and limitations of each. Note that all clock rates shown are at STM-64/OC-192 rate, but should be scaled
appropriately for other data rates.
The LVPECL TxREFCLK, provided via the 300-pin interface, may be at 1/16 or 1/64 of the transmitted serial
data rate. The TxREFCLK must be synchronous with the TxPICLK. There are several approaches to ensure
this synchronous relationship. The two most common are
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