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ICX058AL Datasheet, PDF (8/17 Pages) Sony Corporation – 1/3-inch CCD Image Sensor for EIA Black-and-White Video Camera
(5) Substrate clock waveform
100%
90%
VSUB
10%
0%
VφSUB
tr
twh
φM
φM
2
tf
ICX058AL
Clock Switching Characteristics
Note) Because the horizontal final stage transfer clock LHφ1 is connected to the horizontal transfer clock Hφ1,
specifications will be the same as Hφ1.
twh
twl
tr
tf
Item
Symbol
Unit Remarks
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Readout clock VT
2.3 2.5
0.5
0.5
µs
During
readout
Vertical transfer Vφ1, Vφ2,
clock
Vφ3, Vφ4
15
250 ns ∗1
During
imaging
Hφ1, LHφ1
Hφ2
During
Hφ1, LHφ1
parallel-serial
conversion Hφ2
18 24
21 26
5.38
19.5 26
19 24
5.38
10 17.5
10 15
0.01
0.01
10 17.5 ns ∗2
10 15
0.01
µs
0.01
Reset gate clock φRG
11 13
51
3
3
ns
Substrate clock φSUB
1.5 1.8
0.5
0.5
µs
During
drain charge
∗1 When vertical transfer clock driver CXD1250 is used.
∗2 tf ≥ tr – 2ns, and the cross-point voltage (VCR) for the Hφ1 · LHφ1 rising side of the Hφ1 · LHφ1 and Hφ2
waveforms must be at least 2.5V.
two
Item
Symbol
Unit Remarks
Min.
Typ.
Max.
Horizontal transfer clock Hφ1 · LHφ1, Hφ2
16
20
ns
∗3
∗3 The overlap period for twh and twl of horizontal transfer clocks Hφ1 · LHφ1 and Hφ2 is two.
–8–