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CXK58512TM Datasheet, PDF (8/12 Pages) Sony Corporation – 65536-word X 8-bit High Speed CMOS Static RAM
CXK58512TM/M
• Write cycle (3) : CE2 control
Address
OE
CE1
CE2
WE
Data in
Data out
tWC
tAW
tCW
tAS
tCW
tWR1 *3
tWP
tDW
tDH
Data
valid
High impedance
∗1 Write is executed when both CE1 and WE are at low and CE2 is at high simultaneously.
∗2 Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition.
∗3 tWR1 is tested from either the rising edge of CE1 or the falling edge of CE2, whichever comes earlier, until
the end of the write cycle.
–8–