ICX424AL Datasheet, PDF (7/29 Pages) Sony Corporation – Diagonal 6mm (Type 1/3) Progressive Scan CCD Solid-state Image Sensor with Square Pixel for B/W Cameras

ICX424AL
(3) Horizontal transfer clock waveform
Hφ1, Hφ2
tr
twh
Hφ2
90%
VφH
10%
Hφ1
two
tf
VφH
2
VCR
twl
VHL
Cross-point voltage for the Hφ1 rising side of the horizontal transfer clocks Hφ1 and Hφ2 waveforms is VCR.
The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.
(4) Reset gate clock waveform
φRG
tr
twh
tf
RG waveform
VRGH
VRGLH
VRGLL
VRGLm
VφRG
twl
Point A
VRGL
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from
Point A in the above diagram until the rising edge of RG.
In addition, VRGL is the average value of VRGLH and VRGLL.
VRGL = (VRGLH + VRGLL)/2
Assuming VRGH is the minimum value during the interval twh, then:
VφRG = VRGH – VRGL
Negative overshoot level during the falling edge of RG is VRGLm.
(5) Substrate clock waveform
φSUB
100%
90%
VφSUB
10%
VSUB
0%
(A bias generated within the CCD)
tr
twh
tf
–7–
φM
φM
2