CXD2401R Datasheet, PDF (6/21 Pages) Sony Corporation – Electronic Iris Control IC

CXD2401R
3) HD/VD take-in characteristics
HD
VD
0.3VDD
0.3VDD
CL
0.7VDD
ts4
th4
(Within recommended operating range, Load capacity of CL = 30pF)
Symbol
Definition
ts4 HD/VD set-up time, activated by CL
th4 HD/VD hold time, activated by CL
Min. Typ. Max. Unit
5
ns
7
ns
4) Phase discrimination characteristics by VD/HD input
NTSC: ODD field
PAL: EVEN field
NTSC: EVEN field
PAL: ODD field
VD
0.3VDD
tpd2
HD
When the HD logic level is Low tpd2 after VD falls,
the phase is discriminated as an ODD field (NTSC).
VD
0.3VDD
tpd2
HD
When the HD logic level is High tpd2 after VD falls,
the phase is discriminated as an EVEN field (NTSC).
(Within recommended operating range)
Symbol
Definition
tpd2 Field discriminating clock phase, activated by the falling edge of VD
Min. Typ. Max. Unit
700
1000 ns
–6–