ILX103A Datasheet, PDF (5/12 Pages) Sony Corporation – 3000-pixel CCD Linear Image Sensor (B/W)

ILX103A
Input Clock Voltage Condition
Item
VIH
VIL
Min.
Typ. Max. Unit
3.0
VDD
5.5
V
0.0
—
0.1
V
∗ _{This is applied to the all external pulses.}
(φCLK, φROG, φSHUT)
φCLK Timing (For all modes)
t1
φCLK
t2
t3
t4
Item
φCLK pulse rise/fall time
φCLK pulse Duty^∗1
∗1 _{100 × t4/ (t3 + t4)}
φROG, φCLK Timing
Symbol
t1, t2
—
Min.
Typ. Max. Unit
0
10
100
ns
40
50
60
%
φROG
t6
t7
t5
φCLK
t8
t9
Item
φROG, φCLK pulse timing 1
φROG, φCLK pulse timing 2
φROG pulse rise/fall time
φROG pulse period
Note) τ is the period of φCLK.
Symbol
t5
t9
t6, t8
t7
Min.
Typ. Max. Unit
1/8τ
1/4τ
3/8τ
ns
1/8τ
1/4τ
3/8τ
ns
0
10
100
ns
6τ
10τ
20τ
ns
–5–