ICX038DNB Datasheet, PDF (5/20 Pages) Sony Corporation – Diagonal 8mm (Type 1/2) CCD Image Sensor for NTSC Color Video Cameras

ICX038DNB
Clock Voltage Conditions
Item
Symbol
Readout clock voltage VVT
VVH1, VVH2
VVH3, VVH4
VVL1, VVL2,
VVL3, VVL4
VφV
Vertical transfer clock
voltage
I VVH1 – VVH2 I
VVH3 – VVH
VVH4 – VVH
VVHH
VVHL
VVLH
VVLL
Horizontal transfer
VφH
clock voltage
VHL
Reset gate clock
voltage^∗1
VRGL
VφRG
VRGLH – VRGLL
Substrate clock voltage VφSUB
Min.
Typ.
Max.
Unit
Waveform
diagram
Remarks
14.55 15.0 15.45 V
1
–0.05 0 0.05 V
2
VVH = (VVH1 + VVH2)/2
–0.2 0 0.05 V
2
–9.6 –9.0 –8.5 V
2
VVL = (VVL3 + VVL4)/2
8.3 9.0 9.65 Vp-p
2
0.1 V
2
–0.25
0.1 V
2
–0.25
0.1 V
2
0.5 V
2
0.5 V
2
0.5 V
2
0.5 V
2
4.75 5.0 5.25 Vp-p
3
–0.05 0 0.05 V
3
∗₁
V
4
4.5 5.0 5.5 Vp-p
4
0.8 V
4
23.0 24.0 25.0 Vp-p
5
VφV = VVHn – VVLn (n = 1 to 4)
High-level coupling
High-level coupling
Low-level coupling
Low-level coupling
Low-level coupling
∗_{1 Input the reset gate clock without applying a DC bias. In addition, the reset gate clock can also be driven}
with the following specifications.
Item
Reset gate clock
voltage
Symbol
VRGL
VφRG
Min.
Typ.
Max.
Unit
Waveform
diagram
–0.2 0 0.2 V
4
8.5 9.0 9.5 Vp-p
4
Remarks
–5–