CXD1267AN Datasheet, PDF (5/8 Pages) Sony Corporation – CCD Vertical Clock Driver

Measurement Circuit
0.1µF
R1
C1
500pF
C2
C2
C1
C2
C2
R1
C1
R2
–8.5V
0V
R1
C1
R1
20 19 18 17 16 15 14 13 12 11
CXD1267AN
1 2 3 4 5 6 7 8 9 10
0.1µF
15V 4.5V
Timing generator (CXD1156Q)
R1; 27Ω
R2; 5Ω
C1; 1500pF
C2; 3300pF
CXD1267AN
Operational Amplifier Gain Characteristics
[V]
Ta = –20 to +75°C _{IDCOUT = 0µA}
25.0
At VH = 15V, VL = –8.5V
At VH = 14.5V, VL = –6.0V
2.5/div
0
0.5/div
5.0 [V]
Input voltage
Note) Operating amplifier maximum output voltage is restricted as shown in the formula below depending on
supply voltage setting of VH and VL.
Maximum output voltage VDCOUT (max) ≈ VH + | VL | – 0.8V
For instance, when VH = 14.5V and VL = –6.0V, output voltage is saturated at approximately 19.7V as
shown above figure.
–5–