CXA2076Q Datasheet, PDF (5/48 Pages) Sony Corporation – Y/C/RGB/D for PAL/NTSC Color TVs

Pin
No.
Symbol
10 SCPOUT
CXA2076Q
Equivalent circuit
Description
1k
Sand castle pulse output. The 0 to 5V
BGP pulse, the phase of which is
10
controlled through the bus, is
superimposed with the 0 to 2V H and
10k
1k
VBLK pulse for output.
11 YS1
12 R1IN
13 G1IN
14 B1IN
100µA
YSSW control input.
When YS is high, the RGB1 block signal
is selected; when YS is low, the Y/C block
is selected. This function can be disabled
11
by the YS1OFF setting for the I²C bus.
40k
VILMAX = 0.4V
VIHMIN = 1.0V
200 ^{Analog R, G and B signal inputs.}
12
Input a 0.7Vp-p (no sync, 100 IRE) signal
13
via a capacitor.
The signal is clamped to 5.7V at the burst
14
timing of the signal input to the HSIN
30k
input pin (Pin 47).
15 YS2
100µA
YS/YMSW YS control input.
When YS is high, the RGB2 block signal
is selected; when YS is low, the YSSW
15
40k
output signal is selected.
VILMAX = 0.4V
VIHMIN = 1.0V
16 YM
100µA
YS/YMSW YM control input.
When YM is high, the YSSW output
signal is attenuated by 9.6dB.
16
VILMAX = 0.4V
40k
VIHMIN = 1.0V
–5–