CXA2150AQ Datasheet, PDF (45/90 Pages) Sony Corporation – CRT DRIVER

CXA2150AQ
3) Supported HOUT storage times
The H_DRV signal output from Pin 40 is input to the horizontal deflection circuit of TV set to generate an H-pulse.
This IC provides Normal mode and Long mode to support storage times from the rising edge of HD signal to
the rising edge of H-pulse input to Pin 39 HP_IN.
See Table 1 for settings Pins F0 and F1.
CXA2150Q
HP_IN 39
H_DRV 40
H-pulse
Storage time
HD signal
H-deflection circuit
HOUT
To H-deflection block
Fig. 1. Storage Time from HD to H-pulse
The storage time differs slightly depending on the drive conditions of a TV set, etc.
Fig. 2 shows examples of the range of the storage time covered for each mode.
Conditions: "H_POSITION" and "AFC_BOW, ANGLE" etc. are center value, and the input H-pulse width is 4.5µs.
Assuming that an H-pulse width on a TV set is Tw [µs], a converted value on Fig. 2, ∆ST [µs] is;
∆ST = (4.5 – Tw) /2,
∆ST < 0 (negative) : Shift to left, ∆ST > 0 (positive) : Shift to right.
In additions, the variable range for "H_POSITION" and "AFC_BOW, ANGLE" etc. are in Fig. 2.
Storage time [µs]
Normal
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
PS15K
PS31K
PS33K
PS37K
PS45K
Long
PS31K
PS33K
PS45K
Fig. 2. Reference Example of Supported Storage Times for Each Mode (H-pulse Width: 4.5µs)
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