ICX204AL Datasheet, PDF (4/22 Pages) Sony Corporation – Diagonal 6mm (Type 1/3) Progressive Scan CCD Image Sensor with Square Pixel for B/W Cameras

ICX204AL
Bias Conditions
Item
Symbol Min. Typ. Max. Unit Remarks
Supply voltage
Protective transistor bias
Substrate clock
Reset gate clock
VDD
14.55 15.0 15.45 V
VL
∗1
φSUB
∗2
φRG
∗2
∗1 _{VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL}
power supply for the V driver should be used.
∗2 _{Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated}
within the CCD.
DC Characteristics
Item
Supply current
Symbol Min.
IDD
Typ.
5.5
Max. Unit Remarks
mA
Clock Voltage Conditions
Item
Symbol
Readout clock voltage _VVT
VVH02A
VVH1, VVH2A,
VVH2B, VVH3
VVL1, VVL2A,
VVL2B, VVL3
Vertical transfer clock
voltage
Vφ1, Vφ2A,
Vφ2B, Vφ3
| VVL1 – VVL3 |
VVHH
VVHL
VVLH
VVLL
Horizontal transfer
VφH
clock voltage
VHL
Reset gate clock
voltage
VφRG
VRGLH – VRGLL
VRGL – VRGLm
Substrate clock voltage VφSUB
Min.
Typ.
Max.
Unit
Waveform
diagram
Remarks
14.55 15.0 15.45 V
1
–0.05 0 0.05 V
2
VVH = VVH02A
–0.2 0 0.05 V
2
–8 –7.5 –7 V
2
VVL = (VVL1 + VVL3)/2
7 7.5 8 V
0.1 V
0.9 V
1.3 V
1.0 V
0.9 V
3.0 3.3 3.6 V
–0.05 0 0.05 V
3.0 3.3 3.6 V
0.4 V
0.5 V
21.55 22.5 23.45 V
2
2
2
High-level coupling
2
High-level coupling
2
Low-level coupling
2
Low-level coupling
3
3
4
4
Low-level coupling
4
Low-level coupling
5
–4–