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ICX228AK Datasheet, PDF (3/18 Pages) Sony Corporation – Diagonal 4.5mm (Type 1/4) CCD Image Sensor for NTSC Color Video Cameras | |||
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ICX228AK
Bias Conditions
Item
Symbol Min. Typ. Max. Unit Remarks
Supply voltage
VDD 11.64 12.0 12.36 V
Protective transistor bias
VL
â1
Substrate clock
ÏSUB
â2
Reset gate clock
ÏRG
â2
â1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL
power supply for the V driver should be used.
â2 Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated
within the CCD.
DC Characteristics
Item
Supply current
Symbol Min.
IDD
Typ.
3.5
Max. Unit Remarks
5.5 mA
Clock Voltage Conditions
Item
Symbol
Min.
Typ.
Max.
Unit
Waveform
diagram
Remarks
Readout clock voltage
Vertical transfer clock
voltage
Horizontal transfer
clock voltage
VVT
VVH1, VVH2
VVH3, VVH4
VVL1, VVL2,
VVL3, VVL4
VÏV
VVH3 â VVH
VVH4 â VVH
VVHH
VVHL
VVLH
VVLL
VÏH
VHL
11.64 12.0 12.36 V
â0.05 0 0.05 V
â0.2 0 0.05 V
â5.5 â5.0 â4.5 V
4.3 5.0 5.55 V
â0.25
0.1 V
â0.25
0.1 V
0.3 V
0.3 V
0.3 V
0.3 V
3.0 3.3 3.6 V
â0.05 0 0.05 V
Reset gate clock
voltage
VÏRG
3.0 3.3 3.6 V
VRGLH â VRGLL
0.4 V
VRGL â VRGLm
0.5 V
Substrate clock voltage VÏSUB
16.14 17.0 17.86 V
1
2
VVH = (VVH1 + VVH2)/2
2
2
VVL = (VVL3 + VVL4)/2
2
VÏV = VVHn â VVLn (n = 1 to 4)
2
2
2
High-level coupling
2
High-level coupling
2
Low-level coupling
2
Low-level coupling
3
3
4
Input through 0.1µF
capacitance
4
Low-level coupling
4
Low-level coupling
5
â3â
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