CXD3609R Datasheet, PDF (3/72 Pages) Sony Corporation – Timing Generator for Progressive Scan CCD Image Sensor

CXD3609R
Pin Description
Pin
No.
Symbol
1 VSS1
2 RST
3 SNCSL
4 ID/EXP
5 WEN
6 SSGSL
7 VDD1
8 RG
9 VSS2
10 H1A
11 VDD2
12 H1B
13 H2A
14 VSS3
15 H2B
16 VDD3
17 VDD4
18 XSHP
19 XSHD
20 PBLK
21 CLPDM
22 OBCLP
23 ADCLK
24 VSS4
25 CKO
26 CKI
I/O
Description
— GND
Internal system reset input. High: Normal operation, Low: Reset control.
I Normally apply reset during power-on.
Schmitt trigger input/protective diode on power supply side
I
Control input used to switch sync system. High: CKI sync, Low: MCKO sync.
With pull-down resistor
Vertical direction line identification pulse output/exposure time identification
O pulse output.
Switching possible using the serial interface data. (Default: ID)
O Memory write timing pulse output.
I
Internal SSG enable. High: Internal SSG valid, Low: External sync valid.
With pull-down resistor
— 3.3V power supply. (Power supply for common logic block)
O
CCD reset gate pulse output.
Logic phase adjustment possible using the serial interface data.
— GND
O
CCD horizontal register clock output.
Logic phase adjustment possible using the serial interface data.
— 5/3.3V power supply. (Power supply for H)
O
CCD horizontal register clock output.
Logic phase adjustment possible using the serial interface data.
O
CCD horizontal register clock output.
Logic phase adjustment possible using the serial interface data.
— GND
O
CCD horizontal register clock output.
Logic phase adjustment possible using the serial interface data.
— 5/3.3V power supply. (Power supply for H)
— 3.3V power supply. (Power supply for CDS)
O
CCD precharge level sample-and-hold pulse output.
Logic phase adjustment possible using the serial interface data.
O
CCD data level sample-and-hold pulse output.
Logic phase adjustment possible using the serial interface data.
O Pulse output for horizontal and vertical blanking period pulse cleaning.
O CCD dummy signal clamp pulse output.
O
CCD optical black signal clamp pulse output.
The horizontal OB pattern can be changed using the serial interface data.
O
Clock output for analog/digital conversion IC.
Logic phase adjustment possible using the serial interface data.
— GND
O Inverter output.
I Inverter input.
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