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ICX076AK Datasheet, PDF (2/19 Pages) Sony Corporation – Diagonal 3.6mm (Type 1/5) CCD Image Sensor for NTSC Color Video Cameras
ICX076AK
Block Diagram and Pin Configuration
(Top View)
76
5
4
3
2
1
Cy
Ye
Cy
Ye
G
Mg
G
Mg
Cy
Ye
Cy
Ye
G
Mg
G
Mg
Cy
Ye
Cy
Ye
Mg
G
Mg
G Note)
Horizontal register
8
9
10
11
12 13 14
Note)
: Photo sensor
Pin Description
Pin No. Symbol
Description
Pin No. Symbol
Description
1
Vφ4
Vertical register transfer clock
8
VDD
Supply voltage
2
Vφ3
Vertical register transfer clock
9 GND GND
3
Vφ2
Vertical register transfer clock
10 SUB Substrate (overflow drain)
4
Vφ1
5
CGG
Vertical register transfer clock
Output amplifier gate∗1
11 VL
12 RG
Protective transistor bias
Reset gate clock
6 GND GND
13 Hφ1
Horizontal register transfer clock
7
VOUT
Signal output
14 Hφ2
Horizontal register transfer clock
∗1 DC bias is applied within the CCD, so that this pin should be grounded externally through a capacitance of
1µF or more.
Absolute Maximum Ratings
Item
Substrate voltage SUB – GND
Ratings
–0.3 to +55
Supply voltage
VDD, VOUT, CGG – GND
VDD, VOUT, CGG – SUB
Clock input
voltage
Vφ1, Vφ2, Vφ3, Vφ4 – GND
Vφ1, Vφ2, Vφ3, Vφ4 – SUB
Voltage difference between vertical clock input pins
–0.3 to +18
–55 to +12
–15 to +20
to +12
to +15
Voltage difference between horizontal clock input pins
to +17
Hφ1, Hφ2 – Vφ4
–17 to +17
Hφ1, Hφ2 – GND
–10 to +15
Hφ1, Hφ2 – SUB
–55 to +10
VL – SUB
Vφ1, Vφ3, VDD, VOUT – VL
–65 to +0.3
–0.3 to +27.5
RG – GND
–0.3 to +22.5
Vφ2, Vφ4, CGG, Hφ1, Hφ2, GND – VL
–0.3 to +17.5
Storage temperature
–30 to +80
Operating temperature
–10 to +60
∗2 +27V (Max.) when clock width < 10µs, clock duty factor < 0.1%.
∗3 When CGG or GND (Pin 6) are grounded.
–0.3 to + 17.5V when CGG and GND (Pin 6) are to be disconnected.
–2–
Unit Remarks
V
V
V
V
V
V
∗2
V
V
V
V
V
V
∗3
V
V
°C
°C