CXG1130AER Datasheet, PDF (2/8 Pages) Sony Corporation – Triple Low Noise Amplifier/Dual Mixer

Block Diagram and Pin Configuration
12 11 10 9 8 7
RFout1 13
6 RFout2
GND 14
5 GND
CTL1 15
4 CTL2
MIXin1 16
3 GND
GND 17
2 OPT
VDD_LO1 18
1 MIXin2
19 20 21 22 23 24
CXG1130AER
Recommended Evaluation Circuit
LNAin_885MHz LNAin_810MHz
LNAin_1490MHz
VDD_LNA800MHz-band
22nH
27nH
22pF 100pF 12pF
2.7nH
15nH
VDD_LNA1500MHz-band
1nF
8.2nH
1nF
LNAout_810/885MHz
10nH
12 11 10 9 8 7
6.8nH
13
6
100pF
18nH
3.9nH _{LNAout_1490MHz}
100pF
14
5
CTL1
MIXin_810/885MHz
15
4.7kΩ
4.7kΩ
CTL2
4
10nH
16
2.7nH 22nH
17
3
470kΩ
2
MIXin_1490MHz
VDD_LO680/755MHz
1nF
18
1
33nH
19 20 21 22 23 24
8.2nH 1nH
2.7nH
LOin_680/755MHz
39nH
8.2nH
8.2nH
5pF
1nF
VDD_LO1360MHz
LOin_1360MHz
3.9nH
150nH
100pF
100nH
IFout_130MHz
1nF
VDD_MIX
–2–