CXP829P60 Datasheet, PDF (17/24 Pages) Sony Corporation – CMOS 8-bit Single Chip Microcomputer

CXP829P60
Serial transfer (CH1) (SIO mode)
(Ta = –10 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V reference)
Item
SCK1 cycle time
SCK1
High, Low level width
Symbol Pin
tKCY SCK1
tKH
tKL
SCK1
Condition
Input mode
Ouput mode
Input mode
Ouput mode
Min.
2tsys + 200
16000/fc
tsys + 100
8000/fc – 50
Max.
Unit
ns
ns
ns
ns
SI1 input setup time
(for SCK1 ↑)
tSIK
SI1 input hold time
(for SCK1 ↑)
tKSI
SCK1 ↓ → SO1 delay time tKSO
SI1
SI1
SO1
SCK1 input mode
SCK1 ouput mode
SCK1 input mode
SCK1 ouput mode
SCK1 input mode
SCK1 ouput mode
100
200
tsys + 200
100
ns
ns
ns
ns
tsys + 200
ns
100
ns
Note 1) tsys indicates the three values below according to the upper two bits (CPU clock selected) of the
control clock registor (CLC: 00FEH).
tsys (ns) = 2000/fc (upper two bits = "00"), 4000/fc (upper two bits = "01"), 16000/fc (upper two bits = "11")
Note 2) The load condition for the SCK1output mode, SO1 output delay time is 50pF + 1TTL.
Fig. 5. Serial transfer CH1 timing (SIO mode)
tKL
SCK1
tKCY
tKH
tSIK
tKSI
0.8VDD
0.2VDD
SI1
SO1
Input data
0.8VDD
0.2VDD
tKSO
0.8VDD
0.2VDD
Output data
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