CXD3029R Datasheet, PDF (116/201 Pages) Sony Corporation – CD Digital Signal Processor with Built-in Digital Servo + Shock-proof Memory Controller + Digital High & Bass Boost

CXD3029R
Digital Audio Data Input
The input signal of the digital audio data is input through the DAC input signal pins PCMDI, LRCKI and BCKI.
The input format supports the 48-bit slot, MSB first.
Mute Function
By setting the command bit DOUT_DMUT to "1", all the audio data portions in the Digital Out output can be set
to "0" without altering the Channel Status Data.
Input/Output Synchronization Circuit
In normal operation, the DAC automatically synchronizes with the input LRCK. However, synchronization may
not be achieved when the input data contains much jitter or during power-on, etc. In such cases, internal
operation should be forcibly resynchronized by setting the $34A command DOUT WOD to "1". Forced
synchronization is also required when the operating frequency is changed such as switching between CLV and
CAV, etc. Be sure to set DOUT WOD to "0" and then to "1" for forced resynchronization.
∗ _{Resynchronization clears the internal frame counter so that the count starts over from frame 0 after the}
resynchronization processing. In cases where automatic resynchronization processing is not desirable or the
user wants to do it manually, set the $34A command WINEN to "0" to disable the resynchronization circuit.
DOUT Circuit Clock System
For the DOUT block, the master clock is set using the clock control command MCSL ($A) employed by the
DAC block. Set MCSL to "1" for 768fs, and to "0" for 384fs.
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