CXP88852 Datasheet, PDF (1/32 Pages) Sony Corporation – CMOS 8-bit Single Chip Microcomputer

CXP88852/88860
CMOS 8-bit Single Chip Microcomputer
Description
The CXP88852/88860 is a CMOS 8-bit micro-
computer which consists of A/D converter, serial
interface, timer/counter, time base timer, high
precision timing pattern generation circuits, PWM
output, VISS/ VASS circuit, 32kHz timer/counter,
remote control receiving circuit, VSYNC separator
and the measurement circuit which measure signals
of capstan FG amplifier and drum FG/PG amplifier
and other servo systems, as well as basic
configurations like 8-bit CPU, ROM, RAM and I/O
port. They are integrated into a single chip.
Also, CXP88852/88860 provides sleep/stop function
which enables to lower power consumption.
100 pin QFP (Plastic)
Structure
Silicon gate CMOS IC
Features
• A wide instruction set (213 instructions) which cover various types of data
— 16-bit arithmetic/multiplication and division/boolean bit operation instructions
• Minimum instruction cycle 250ns at 16MHz operation
122µs at 32kHz operation
• Incorporated ROM capacity 52K bytes (CXP88852)
60K bytes (CXP88860)
• Incorporated RAM capacity 1600 bytes (including PPG RAM)
• Peripheral function
— A/D converter
8 bits, 14 channels, successive approximation system
(Conversion time of 20µs/16MHz)
— Serial interface
Incorporated 8-bit, 8-stage FIFO for data
(Auto transfer for 1 to 8 bytes), 1 channel
8-bit clock sync type, 1 channel
— Timer
8-bit timer/counter, 2 channels
19-bit time base timer
32kHz timer/counter
— High precision timing pattern generation PPG 19 pins 32-stage programmable circuit
RTG 5 pins, 1 channel
5-bit, 8-satge FIFO (RECCTL control), 1channel
— PWM/DA gate output
12 bits, 2 channels (Repetitive frequency 62.5kHz/16MHz)
DA gate pulse output, 13 bits, 2 channels
— Analog signal input circuit
Capstan FG amplifier circuit
Drum FG amplifier circuit
Drum PG amplifier circuit
PBCTL amplifier circuit
— CTL write/rewrite circuit
Recording current control circuit
— Servo input control
Capstan FG, Drum FG/PG, CTL input
— VSYNC separator
— FRC capture unit
Incorporated 26-bit and 8-stage FIFO
— PWM output
14-bit, 1 channel
— VISS/VASS circuit
Pulse duty auto detection circuit
— 32kHz timer/event counter
32kHz oscillation circuit, ultra-low speed instruction mode
— Remote control reception circuit
8-bit pulse measurement counter, 6-stage FIFO
— Tri-state output
PPG 1 pin, output 8 pins
— Pseudo HSYNC output function
— High speed head switching circuit
• Interruption
20 factors, 15 vectors, multi-interruption possible
• Standby mode
SLEEP/STOP
• Package
100-pin plastic QFP
• Piggyback/evaluation chip
CXP88800 100-pin ceramic QFP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E96515-ST