CXP878P60 Datasheet, PDF (1/29 Pages) Sony Corporation – CMOS 8-bit Single Chip Microcomputer

CXP878P60
CMOS 8-bit Single Chip Microcomputer
Description
The CXP878P60 is a CMOS 8-bit microcomputer
which consists of A/D converter, serial interface,
timer/counter, time base timer, high precision timing
pattern generation circuit, PWM output, VISS/VASS
circuit, 32kHz timer/counter, remote control reception
circuit, HSYNC counter, VSYNC separator and the
measurement circuit which measures signals of capstan
FG and drum FG/PG and other servo systems, as
well as basic configurations like 8-bit CPU, PROM,
RAM and I/O port. They are integrated into a single
chip.
Also the CXP878P60 provides sleep/stop functions
which enable to lower power consumption.
The CXP878P60 is the PROM-incorporated version
of the CXP87860 with built-in mask ROM. This
provides the additional feature of being able to write
directly into the program. Thus, it is most suitable for
evaluation use during system developement and for
small-quantity production.
100 pin QFP (PIastic)
Structure
Silicon gate CMOS IC
Features
• A wide instruction set (213 instructions) which covers various types of data
— 16-bit arithmetic/multiplication and division/Boolean bit operation instructions
• Minimum instruction cycle
250ns at 16MHz operation (4.5V to 5.5V)
122µs at 32kHz operation
• Incorporated PROM capacity 60K bytes
• Incorporated RAM capacity 2048 bytes
• Peripheral functions
— A/D converter
8 bits, 12 channels, successive approximation system
(Conversion time of 20.0µs at 16MHz)
— Serial interface
Incorporated buffer RAM (Auto transfer for 1 to 32 bytes), 1 channel
Incorporated 8-bit and 8-stage FIFO
(Auto transfer for 1 to 8 bytes), 1 channel
Incorporated two-wire 8-bit and 8-stage FIFO
(Auto transfer for 1 to 8 bytes), 1 channel
— Timer
8-bit timer, 8-bit timer/counter, 19-bit time base timer,
32kHz timer/counter
— High precision timing pattern generator PPG: maximum of 19 pins, 32 stages programmable
RTG: 5 pins, 2 channels
— PWM/DA gate output
PWM: 12 bits, 2 channels (Repetitive frequency of 62kHz at 16MHz)
DA gate pulse output: 13 bits, 4 channels
— Servo input control
Capstan FG, drum FG/PG, CTL input
— VSYNC separator
— FRC capture unit
Incorporated 26-bit and 8-stage FIFO
— PWM output
14 bits
— VISS/VASS circuit
Pulse duty auto detection circuit
— Remote control reception circuit
8-bit pulse measurement counter with on-chip, 6-stage FIFO
— HSYNC counter
12-bit event counter (Counts SYNC1 input.)
• Interruption
23 factors, 15 vectors, multi-interruption possible
• Standby mode
Sleep/stop
• Package
100-pin plastic QFP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E96214-PS