CXL1504M Datasheet, PDF (1/9 Pages) Sony Corporation – CMOS-CCD 1H Delay Line for NTSC

CXL1504M
CMOS-CCD 1H Delay Line for NTSC
Description
The CXL1504M is a delay line used in conjunction
with an external low-pass filter. Through negative
phase input and positive phase output 1H delay time
is obtained for NTSC signals.
20 pin SOP (Plastic)
Features
• Single 5V power supply
• 14.3MHz driver
• Low power consumption at 160mW (Typ.)
• Built-in peripheral circuits
• Completely adjustment free
Functions
• 905.5-bit CCD register
• Clock driver
• Autobias circuit
• Input clamp circuit
• Sample and hold circuit
Structure
CMOS-CCD
Absolute Maximum Ratings (Ta = 25°C)
• Supply voltage
VDD
6
V
• Operating temperature
Topr
–10 to +60
°C
• Storage temperature
Tstg
–55 to +150
°C
• Allowable power dissipation
PD
500
mW
Operating Voltage Range (Ta = 25°C)
Supply voltage
VDD
5 ± 5%
V
Recommended Clock Conditions (Ta = 25°C)
• Input clock amplitude
VCLK
0.3 to 1.0
• Clock frequency
fCLK
14.318182
• Input clock waveform
sine wave
Vp-p (0.5Vp-p typ.)
MHz
Input Signal Amplitude
VSIG
560
mVp-p (Max.)
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E71217A78-PS