CXD1944R Datasheet, PDF (1/21 Pages) Sony Corporation – IEEE1394 3-port 200Mbps Cable Transceiver/Arbiter

PRELIMINARY
CXD1944R
IEEE1394 3-port 200Mbps Cable Transceiver/Arbiter
Description
The CXD1944R is a PHY chip which supports
100/200Mbps speeds and performs cable interface and
bus arbitration. It conforms to the high performance seri-
al bus IEEE1394-1995 standard. The structure is 0.4µm
CMOS and it operates on a single 3.3V power supply.
64 pin LQFP (plastic)
Features
• Conforms to IEEE1394-1995
• Single 3.3V power supply
• Supports 100/200Mbps speeds
• Automatic power down for unused ports
• Power down mode to conserve energy
• Supports short reset operation
• Supports ping for optimization of a Gap_count
Absolute Maximum Ratings
• Supply voltage
VDD –0.5 to +4.6
V
• Input voltage
VI VSS –0.5 to VDD +0.5 V
• Output voltage
VO VSS –0.5 to VDD +0.5 V
• Operating temperature Ta
–20 to +70
°C
• Storage temperature Tstg –55 to +150 °C
• Allowable power dissipation
PD
1000
mW
Operating Conditions
• Supply voltage
VDD
3.0 to 4.5
V
• Operating temperature Ta
–20 to +75
°C
Package
64-pin plastic LQFP (VQFP)
Applications
When used with a LINK chip (e.g. CXD1940R), allows
configuration of a high-speed digital serial interface.
Structure
0.4µm CMOS monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication
or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony
cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
PE96431–ST