FDC37CXFR Datasheet, PDF (87/258 Pages) SMSC Corporation – Plug and Play Compatible Ultra I/O Controller with Fast IR

PARALLEL PORT
The FDC37C93xFR incorporates an IBM XT/AT
compatible parallel port. This supports the
optional PS/2 type bi-directional parallel port
(SPP), the Enhanced Parallel Port (EPP) and
the Extended Capabilities Port (ECP) parallel
port modes. Refer to the Configuration
Registers for information on disabling, power
down, changing the base address of the parallel
port, and selecting the mode of operation. The
FDC37C93xFR also provides a mode for
support of the floppy disk controller on the
parallel port.
The parallel port also incorporates SMSC's
ChiProtect circuitry, which prevents possible
damage to the parallel port due to printer power-
up. The functionality of the Parallel Port is
achieved through the use of eight addressable
ports, with their associated registers and control
gating. The control and data port are read/write
by the CPU, the status port is read/write in the
EPP mode. The address map of the Parallel
Port is shown below:
DATA PORT
BASE ADDRESS + 00H
STATUS PORT
BASE ADDRESS + 01H
CONTROL PORT
BASE ADDRESS + 02H
EPP ADDR PORT
BASE ADDRESS + 03H
The bit map of these registers is:
EPP DATA PORT 0
EPP DATA PORT 1
EPP DATA PORT 2
EPP DATA PORT 3
BASE ADDRESS + 04H
BASE ADDRESS + 05H
BASE ADDRESS + 06H
BASE ADDRESS + 07H
D0
D1
D2
D3
D4
D5
DATA PORT PD0
PD1 PD2 PD3 PD4 PD5
STATUS
PORT
TMOUT
0
0
nERR SLCT PE
CONTROL STROBE AUTOFD nINIT SLC IRQE PCD
PORT
EPP ADDR
PD0
PD1 PD2 PD3 PD4 PD5
PORT
EPP DATA
PD0
PD1 PD2 PD3 PD4 PD5
PORT 0
EPP DATA
PD0
PD1 PD2 PD3 PD4 PD5
PORT 1
EPP DATA
PD0
PD1 PD2 PD3 PD4 PD5
PORT 2
EPP DATA
PD0
PD1 PD2 PD3 PD4 PD5
PORT 3
Note 1: These registers are available in all modes.
Note 2: These registers are only available in EPP mode.
Note 3: For EPP mode, IOCHRDY must be connected to the ISA bus.
D6
PD6
nACK
D7
PD7
nBUSY
Note
1
1
0
0
1
PD6 AD7 2,3
PD6 PD7 2,3
PD6 PD7 2,3
PD6 PD7 2,3
PD6 PD7 2,3
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