EMC6D103S_07 Datasheet, PDF (53/84 Pages) SMSC Corporation – Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features

Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
Table 8.6 Registers 28-2Fh: Fan Tachometer Reading (continued)
Register
Address
2Dh
2Eh
2Fh
Read/
Write
R
R
R
Register Name
Tach3 MSB
Tach4 LSB
Tach4 MSB
Bit 7
(MSb)
15
7
15
Bit 6
14
6
14
Bit 5
13
5
13
Bit 4 Bit 3 Bit 2
12
11
10
4
3
2
12
11
10
Bit 1
9
1
9
Bit 0
(LSb)
8
0
8
Default
Value
N/A
N/A
N/A
The Fan Tachometer Reading registers contain the number of 11.111μs periods (90KHz) between full
fan revolutions. Fans produce two tachometer pulses per full revolution. These registers are updated
at least once every second.
To convert the value in the TACH reading registers to a representative RPM value is a simple
mathematical exercise. The 16bit reading is first converted to a decimal number and then multiplied
by the clock period (11.11μs). This gives the measured period of two full TACH pulses which equals
1 full fan revolution. This number is then inverted and multiplied by 60 to give Rotations / minute.
For example: If the Tach 1 data bytes contain 0C86h (MSB followed by LSB). This is equivalent to
3206 clock counts. Multiplying this number by 11.111μs (clock period) yields 0.03562s. This number
represents the measured time for two full periods of the TACH signal. Inverting this number and
multiplying it by 60 yields a final RPM value of 1684.
The larger the returned count, the slower the measured fan speed. The slowest fan speed that can be
stored is approximately 82RPM with an output code of FFFDh. This slow speed is not practical to
measure in TACH monitoring Mode 2 (see Table 7.2 on page 44 and Table 7.3 on page 45 for minimum
RPM’s measured using Mode 2 and Section 7.1.4.4, "Mode 2 – Monitor Tach input When PWM is
‘ON’," on page 41 for a description of this monitoring mode).
This value is represented for each fan in a 16 bit, unsigned number.
The Fan Tachometer Reading registers always return an accurate fan tachometer measurement, even
when a fan is disabled or non-functional, including when the start bit=0.
When one byte of a 16-bit register is read, the other byte latches the current value until it is read, in
order to ensure a valid reading. The order is LSB first, MSB second.
FFFFh indicates that the fan is not spinning, or the tachometer input is not connected to a valid signal
(This could be triggered by a counter overflow).
FFFEh, if the SLOW bit in the corresponding TACHx Option register is set (see Section 8.2.28,
"Registers 90h-93h: TachX Option Registers," on page 75 for details), indicates that fan is spinning,
but too slowly to be measured at the current TACH settings.
These registers are read only – a write to these registers has no effect.
8.2.4
Registers 30-32h: Current PWM Duty
Register
Address
30h
31h
32h
Read/
Write
R/W
(See
Note 8.8)
R/W
(See
Note 8.8)
R/W
(See
Note 8.8)
SMSC EMC6D103S
Table 8.7 Registers 30-32h: Current PWM Duty
Register Name
PWM1 Current Duty Cycle
Bit 7
(MSb)
7
Bit 6
6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSb)
5
4
3
2
1
0
Default
Value
N/A
PWM2 Current Duty Cycle
7
6
5
4
3
2
1
0
N/A
PWM3 Current Duty Cycle
7
6
5
4
3
2
1
0
N/A
53
DATASHEET
Revision 0.2 (09-25-07)