EMC2303_11 Datasheet, PDF (42/52 Pages) SMSC Corporation – Multiple RPM-Based PWM Fan Controller for Three Fans

5.16
Multiple RPM-Based PWM Fan Controller for Three Fans
Datasheet
Fan Drive Fail Band Registers
Table 5.26 Fan Drive Fail Band Registers
ADDR
R/W
REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT
Fan 1 Drive
3Ah
R/W
Fail Band
16
8
4
2
1
-
-
-
00h
Low Byte
Fan 1 Drive
3Bh
R/W
Fail Band 4096 2048 1024 512 256 128 64 32
00h
High Byte
Fan 2 Drive
4Ah
R/W
Fail Band
16
8
4
2
1
-
-
-
00h
Low Byte
Fan 2 Drive
4Bh
R/W
Fall Band 4096 2048 1024 512 256 128 64 32
00h
High Byte
Fan 3 Drive
5Ah
R/W
Fail Band
16
8
4
2
1
-
-
-
00h
Low Byte
Fan 3 Drive
5Bh
R/W
Fail Band 4096 2048 1024 512 256 128 64 32
00h
High Byte
5.17
The Fan Drive Fail Band Registers store the number of tach counts used by the Fan Drive Fail
detection circuitry. This circuitry is activated when the fan drive setting high byte is at FFh. When it is
enabled, the actual measured fan speed is compared against the target fan speed. These registers
are only used when the FSC is active.
This circuitry is used to indicate that the target fan speed at full drive is higher than the fan is actually
capable of reaching. If the measured fan speed does not exceed the target fan speed minus the Fan
Drive Fail Band Register settings for a period of time longer than set by the DRIVE_FAIL_CNTx[1:0]
bits, then the DRIVE_FAIL status bit will be set and an interrupt generated.
TACH Target Registers
ADDR
3Ch
3Dh
4Ch
4Dh
Table 5.27 TACH Target Registers
R/W
REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT
R/W
TACH Target
1 Low Byte
16
8
4
2
1
-
-
-
F8h
R/W
TACH Target
1 High Byte
4096 2048 1024
512
256
128
64
32
FFh
R
TACH Target
2 Low Byte
16
8
4
2
1
-
-
-
F8h
R/W
TACH Target
2 High Byte
4096 2048 1024
512
256
128
64
32
FFh
Revision 1.3 (05-18-11)
42
DATASHEET
SMSC EMC2303