EMC1423 Datasheet, PDF(42/45 Page) SMSC Corporation – 1°C Temperature Sensor with Hardware Thermal Shutdown

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EMC1423 Datasheet, PDF (42/45 Pages) SMSC Corporation – 1°C Temperature Sensor with Hardware Thermal Shutdown

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1Â°C Temperature Sensor with Hardware Thermal Shutdown

Datasheet

Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear

the LOW status bit in the Status Register.

The ALERT pin will be set if the programmed number of consecutive alert counts have been met and

any of these status bits are set.

The status bits will remain set until read unless the ALERT pin is configured as a comparator output

(see Section 5.3.2).

Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low

limit.

Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low

limit.

Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low

limit.

Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.

6.18 THERM Limit Status Register

ADDR. R/W REGISTER

THERM

37h

R-C Limit Status

Table 6.22 THERM Limit Status Register

DEFAULT

THERM THERM THERM ITHERM

00h

The THERM Limit Status Register contains the status bits that are set when a temperature channel

THERM Limit is exceeded. If any of these bits are set, then the THERM status bit in the Status Register

is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the

temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status

bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all

individual channel THERM bits are cleared.

Bit 3 - E3THERM - This bit is set when the External Diode 3 channel exceeds itâs programmed THERM

Limit.

Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds itâs programmed THERM

Limit.

Bit 1 - E1THERM - This bit is set when the External Diode 1 channel exceeds itâs programmed THERM

limit.

Bit 0- ITHERM - This bit is set when the Internal Diode channel exceeds itâs programmed THERM limit.

6.19 Filter Control Register

Table 6.23 Filter Configuration Register

ADDR.

R/W

B0 DEFAULT

40h

R/W

Filter Control

FILTER[1:0]

00h

The Filter Configuration Register controls the digital filter on the External Diode 1 channel.

Revision 1.16 (03-15-07)

DATASHEET

SMSC EMC1423/EMC1424

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