EMC2305 Datasheet, PDF (36/55 Pages) SMSC Corporation – Multiple RPM-Based PWM Fan Controller for Five Fans

5.7
Fan Setting Registers
Multiple RPM-Based PWM Fan Controller for Five Fans
Datasheet
ADDR
30h
40h
50h
60h
70h
Table 5.8 Fan Driver Setting Registers
R/W
REGISTER
B7 B6 B5 B4
B3 B2 B1 B0
DEFAULT
R/W
Fan 1 Setting 128 64
32
16
8
4
2
1
00h
R/W
Fan 2 Setting 128 64
32
16
8
4
2
1
00h
R/W
Fan 3 Setting 128 64
32
16
8
4
2
1
00h
R/W
Fan 4 Setting 128 64
32
16
8
4
2
1
00h
R/W
Fan 5 Setting 128 64
32
16
8
4
2
1
00h
The Fan Setting register always displays the current setting of the respective fan driver. Reading from
any of the registers will report the current fan speed setting of the appropriate fan driver regardless of
the operating mode. Therefore it is possible that reading from this register will not report data that was
previously written into this register.
While the RPM-based Fan Speed Control Algorithm is active, the register is read only. Writing to the
register will have no effect and the data will not be stored.
The contents of the register represent the weighting of each bit in determining the final output voltage.
The output drive for a PWM output is given by Equation [1].
Drive
=
⎛
⎝
V_-----A_-2---L_5----5U_-----E_{--⎠⎞}
× 100%
[1]
5.8
PWM Divide Registers
Table 5.9 PWM Divide Registers
ADDR R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0 DEFAULT
31h
R/W Fan 1 Divide 128 64
32
16
8
4
2
1
01h
41h
R/W Fan 2 Divide 128 64
32
16
8
4
2
1
01h
51h
R/W Fan 3 Divide 128 64
32
16
8
4
2
1
01h
61h
R/W Fan 4 Divide 128 64
32
16
8
4
2
1
01h
71h
R/W Fan 5 Divide 128 64
32
16
8
4
2
1
01h
The PWM Divide registers determine the final frequency of the respective PWM Fan Driver. Each driver
base frequency is divided by the value of the respective PWM Divide Register to determine the final
frequency. The duty cycle settings are not affected by these settings, only the final frequency of the
PWM driver. A value of 00h will be decoded as 01h.
Revision 1.1 (10-12-09)
36
DATASHEET
SMSC EMC2305