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EMC2303 Datasheet, PDF (28/51 Pages) SMSC Corporation – Multiple RPM-Based PWM Fan Controller
Multiple RPM-Based PWM Fan Controller
Datasheet
Table 5.1 EMC2303 Register Set (continued)
ADDR R/W
5Ch R/W
5Dh R/W
5Eh
R
5Fh
R
EF R/W
FCh
R
FDh
R
FEh
R
FFh
R
REGISTER
NAME
FUNCTION
DEFAULT
VALUE LOCK
TACH 3 Target
Low Byte
Holds the target tachometer reading low
byte for Fan 3
F8h
TACH 3 Target
High Byte
Holds the target tachometer reading
high byte for Fan 3
FFh
TACH 3 Reading Holds the tachometer reading high byte
High Byte
for Fan 3
FFh
TACH 3 Reading Holds the tachometer reading low byte
Low Byte
for Fan 3
F8h
Lock Register
Software Lock
Locks all SWL registers
00h
Revision Registers
Product Features
Indicates functions determined upon
device power up by external pin states
00h
Product ID
Stores the unique Product ID
35h
Manufacturer ID
Stores the Manufacturer ID
5Dh
Revision
Revision
80h
No
No
No
No
SWL
No
No
No
No
PAGE
Page 41
Page 41
Page 42
Page 42
Page 43
Page 43
Page 44
Page 45
Page 45
5.1.1
During Power-On-Reset (POR), the default values are stored in the registers. A POR is initiated when
power is first applied to the part and the voltage on the VDD supply surpasses the POR level as
specified in the electrical characteristics. Any reads to undefined registers will return 00h. Writes to
undefined registers will not have an effect.
Lock Entries
The Lock Column describes the locking mechanism, if any, used for individual registers. All SWL
registers are Software Locked and therefore made read-only when the LOCK bit is set.
5.2
Configuration Register
ADDR R/W
REGISTER
B7
Table 5.2 Configuration Register
B6
B5
B4
B3
20h
R/W Configuration MASK DIS_TO WD_EN
-
-
B2
B1
B0
DEFAULT
-
DR_EXT_
CLK
USE_
EXT_
CLK
40h
The Configuration Register controls the basic functionality of the EMC2303. The bits are described
below. The Configuration Register is software locked.
Bit 7 - MASK - Blocks the ALERT# pin from being asserted.
„ ‘0’ (default) - The ALERT# pin is unmasked. If any bit in either status register is set, the ALERT#
pins will be asserted (unless individually masked via the Mask Register).
„ ‘1’ - The ALERT# pin is masked and will not be asserted.
Revision 1.1 (10-12-09)
28
DATASHEET
SMSC EMC2303