FDC37M81X Datasheet, PDF (192/198 Pages) SMSC Corporation – PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up

PD<7:0>
nACK
nALF
t2
t1
t5
t6
t4
t3
t4
FIGURE 20 - ECP PARALLEL PORT REVERSE TIMING
NAME
DESCRIPTION
t1 PDATA Valid to nACK Asserted
t2 nALF Deasserted to PDATA Changed
t3 nACK Asserted to nALF Deasserted
(Notes 1,2)
t4 nACK Deasserted to nALF Asserted (Note 2)
t5 nALF Asserted to nACK Asserted
t6 nALF Deasserted to nACK Deasserted
MIN TYP MAX UNITS
0
ns
0
ns
80
200
ns
80
200
ns
0
ns
0
ns
Note 1: Maximum value only applies if there is room in the FIFO and terminal count has not been
received. ECP can stall by keeping nALF low.
Note 2: nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
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