USB2224_06 Datasheet, PDF (10/20 Pages) SMSC Corporation – Bus Powered USB2.0 Flash Media Controller

Chapter 6 Pin Descriptions
Bus Powered USB2.0 Flash Media Controller
Datasheet
This section provides a detailed description of each signal. The signals are arranged in functional groups
according to their associated interface.
The “n” symbol in the signal name indicates that the active, or asserted state occurs when the signal is at a
low voltage level. When “n” is not present before the signal name, the signal is asserted when at the high
voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working with
a mixture of “active low” and “active high” signal. The term assert, or assertion indicates that a signal is
active, independent of whether that level is represented by a high or low voltage. The term negate, or
negation indicates that a signal is inactive.
6.1 Pin Descriptions
Table 6.1 - Pin Description
NAME
CF Chip Select
1
CF Chip Select
0
CF Register
Address 2
CF Register
Address 1
CF Register
Address 0
CF Interrupt
CF Data 15-8
CF Data7-0
SYMBOL
BUFFER
TYPE
DESCRIPTION
CompactFlash (In True IDE mode) INTERFACE
CF_nCS1
O8
This pin is the active low chip select 1 signal for the CF
ATA device
CF_nCS0
O8
This pin is the active low chip select 0 signal for the task
file registers of CF ATA device in the True IDE mode.
CF_SA2
O8
This pin is the register select address bit 2 for the CF
device.
CF_SA1
O8
This pin is the register select address bit 1 for the CF
device.
CF_SA0
O8
This pin is the register select address bit 0 for the CF
device.
CF_IRQ
IPD
This is the active high interrupt request signal from the CF
device.
CF_D[15:8]
I/O8
The bi-directional data signals CF_D15-CF_D8 in True
IDE mode data transfer. The bi-directional data signal has
an internal weak pull-down resistor.
CF_D[7:0]
I/O8
The bi-directional data signals CF_D7-CF_D0 in the True
IDE mode data transfer.
In the True IDE Mode, all of task file register operation
occur on the CF_D[7:0], while the data transfer is on
CF_D[15:0].
IO Ready
CF Card
Detection2
CF Card
Detection1
CF_IORDY
CF_nCD2
CF_nCD1
The bi-directional data signal has an internal weak pull-
down resistor.
IPU
This pin is active high input signal from CF card.
IPU
This card detection pin is connected to the ground on the
CF device, when the CF device is inserted.
IPU
This card detection pin is connected to ground on the CF
device, when the CF device is inserted.
Revision 1.3 (06-13-06)
Page 10
DATASHEET
SMSC USB2224