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KBC1122 Datasheet, PDF (1/5 Pages) SMSC Corporation – MOBILE KBC WITH SUPER I/O, SFI, ADC AND DAC WITH SMSC SENTINELALERT | |||
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KBC1122/KBC1122P
Mobile KBC with Super
I/O, SFI, ADC and DAC
with SMSC
SentinelAlert!TM
PRODUCT FEATURES
Data Brief
 3.3V Operation with 5V Tolerant Buffers
 ACPI 1.0b/2.0 and PC99a/PC2001 Compliant
 LPC Interface with Clock Run Support
â Serial IRQ Interface Compatible with Serialized
IRQ Support for PCI Systems
â 15 Direct IRQs
â Three 8-Bit DMA Channels
â ACPI SCI Interface
â nSMI
â Shadowed write only registers
 LPC/Firmware Hub Host Flash Interface
â Single Byte FWH Memory Read and FWH
Memory Write Support
â FWH ID Support
â 16MB FWH Flash and Register Addressing,
128K Legacy BIOS Addressing
â Single Byte LPC Memory Read and LPC Memory
Write Support
 Serial Peripheral Interface (SPI)
â 3-pin Full Duplex serial communication interface.
â Dual Ported Controller with Keeper Circuit
 8 MByte Shared FlashROM Interface (SFI)
â 8051/Host CPU Hardware Arbitrated Interface
â 0.5 - 8MB - Host System BIOS & 8051 Keyboard
â 8051 64KB Code Space Accessible as Separate
32KB Pages in Flash
â Low-Power Flash Access Modes
â 8051-Programmable Flash Access Protection
â Read/Write/No-Access Protection
â Variable Bank Sizes
 Host Flash Address Redirection for Recovery
 Serial Flash Programming Interface
 Two Power Planes
â Low Standby Current in Sleep Mode
â Intelligent Auto Power Management for Super I/O
â Main powered blocks power supplied by standby
power plane and controlled by power
management signals
 3-Port ACPI Embedded Controller Interface
 Configuration Register Set
â Compatible with ISA Plug-and-Play Standard
(Version 1.0a)
â Four Pin Selectable Addressing Options
â 8051-Programmable Base Address
 High-Performance Embedded 8051 Keyboard and
System Controller
â Provides System Power Management
â System Watch Dog Timer (WDT)
â 8042 Style Host Interface Relocatable to 480
Different Base I/O Addresses
â Supports Interrupt and Polling Access
â Interrupt Accelerator
â 512 Bytes Data RAM
â 2 Kilobytes Scratch ROM/RAM
â On-Chip Memory-Mapped Control Registers
â Up to 18x8 Keyboard Scan Matrix
â Two 16 Bit Timer/Counters
â Eleven 8051 Interrupt Sources
â Thirty-Two 8-Bit, Host/8051 Mailbox Registers
â Thirty-six Maskable Hardware Wake-Up Events
â Fast GATEA20
â Fast CPU_RESET
â Multiple Clock Sources and Operating
Frequencies up to 32MHz
â IDLE and SLEEP Modes
â Low Power Fail-Safe Ring Oscillator ±10%
Accuracy
â Hibernation Timer with programmable wake-up
from 0.5ms to 128 minutes
â 8051-Driven 16550A UART
â 16-Byte Send/Receive FIFOs
â External Baud Clock Option
â Power-Fail Status Register
 Advanced Infrared Communications Controller (IRCC
2.0)
â IrDA V1.2 (4Mbps), HPSIR, ASKIR, Consumer IR
Support
â Two IR Ports
â Relocatable Base I/O Address
SMSC KBC1122
PRODUCT PREVIEW
Revision 0.8 (10-19-05)
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