SKY73134 Datasheet, PDF (6/17 Pages) Skyworks Solutions Inc. – Wideband PLL Frequency Synthesizer

PRELIMINARY DATA SHEET • SKY73134 FREQUENCY SYNTHESIZER
PLL Control Registers (R-Divider and N-Divider)
There are three digital PLL control registers that are used to store
the R-divider and N-divider values: R_DIV, N_DIV1, and N_DIV2.
By default, all registers are 25 bits wide. Bit[21] is the read/write
bit, cleared when writing to the device. Bits[20:16] are the
address bits of the registers. The 16 least significant bits (LSBs)
represent the data bits.
Three values are needed to calculate the three PLL dividers,
R_DIV, N_DIV1 and N_DIV2: the desired frequency (FRF), the VCO
divider (D), and the frequency step size (FSTEP).
The VCO frequency (FVCO) has a range of 2.8 GHz to 5.6 GHz, and
is defined by the product of the desired frequency (FRF) and the
VCO divider, D:
F_VCO F_RF u D
(1)
The VCO divider (equal to 1, 2, 3, 4, or 8) is chosen so that the
product of FRF × D is within the specified VCO range.
The frequency step size (FSTEP) is a user defined value. Given FSTEP
and D, the comparison frequency (FCOMP) can be calculated by:
F_COMP F_STEP u D
(2)
The R_DIV register stores the value of the 16-bit R-divider that
produces the desired comparison frequency (FCOMP) for the RF PLL
according to the following equation:
R ^FREF
(3)
F_COMP
Where FREF is the reference frequency provided to the device.
The N_DIV1 and N_DIV2 registers store the value of the N-divider
according to the following equation:
N ^FVCO u R
(4)
F_REF
Bits[1:0] of the N_DIV2 register are the most significant bits
(MSBs) of the 18-bit representation of the N number.
Bits[15:0] of the N_DIV1 register are the LSBs of the 18-bit binary
representation of the N number.
The calculated R-divider and N-divider values are programmed
into the SKY73134 using the SPI interface.
Additional programming information is provided in the Skyworks
document, SKY73134 Frequency Synthesizer Programming Guide,
document number *** TBD ***.
Example:
A desired RF output frequency of 2000 MHz is required using a
reference frequency of 38.4 MHz and a desired frequency step
size of 100 kHz. If the VCO divider is equal to 2, the VCO
frequency is 4000 MHz from Equation 1 and the comparison
frequency is equal to 200 kHz from Equation 2.
From Equations 3 and 4, the R and N values become:
R = 192 = 11000000b
N = 20000 = 100111000100000b
These values would be programmed through the SPI interface.
Figure 5 represents the bits of the R_DIV register with the value of
R = 192. Figures 6 and 7 represent the bits of the N_DIV1 and
N_DIV2 registers, respectively, with the value of N = 20000.
Electrical and Mechanical Specifications
The absolute maximum ratings of the SKY73134 are provided in
Table 3. The recommended operating conditions are specified in
Table 4 and electrical specifications are provided in Tables 5
through 7.
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 00 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0
3-Bit Device
Address
5-Bit Register
Address
1-Bit Read/Write Flag
16-Bit R-Divider Value
S1847
Figure 5. R_DIV Register Showing an R-Divider Value of 192
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
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December 15, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • 201199A