AAT4621_12 Datasheet, PDF (14/17 Pages) Skyworks Solutions Inc. – PC Card Current Limit Interface and Capacitor Charger

DATA SHEET
AAT4621
PC Card Current Limit Interface and Capacitor Charger
Layout Guidance
When laying out the PC board, the following layout
guideline should be followed to ensure proper operation
of the AAT4621/AAT4621-1:
1. The exposed pad EP must be reliably soldered to
GND. The exposed thermal pad should be connected
to the board ground plane and Pin 12. The ground
plane should include a large exposed copper pad
under the package with VIAs to all board layers for
thermal dissipation.
2. The power traces, including GND traces and the VCC
trace should be kept short, direct and wide to allow
large current flow. Use several via pads when rout-
ing between layers.
3. The input capacitors (C1) should be connected as
close as possible to VCC (Pins 8, 9, 10, 11) and GND
(Pin 12) to get good power filtering.
4. The output capacitor (C2) should be connected as
close as possible to OUT (Pins 5, 6, 7) and GND (Pin
12) to get good power filtering as the device will
recharge the Supercap when the output voltage level
sensed on the OUT pin is reduced by approximately
18-20mV below its input voltage (VCC) level.
J1 ^VCC
EN IU
EN IU
J2 ^VCC
EN IL
P2
VCC _TB1
P4
IN
GND
14
EN IL 13
12
VCC
11
10
C1
10µF
9
8
VCC
U1
EN IU
EN IL
GND
VCC
R1
1.5K
D1
LED RED
RDY ^P1
RDY
RDY
RHYS
ISETU
ISETL
1
2 RHYS
3 ISETU
4 ISETL
R2
200K _R3
1M
VCC
OUT
5
VCC
OUT
6 OUT
VCC
OUT
7
+
AAT4621/AAT4621-1
C2
10µF ⁺
SC1
0.55F
R4
120K
R5
47.5K
R6
47.5K
P3
OUT
TB 2
OUT
P5
GND
Figure 2: AAT4621/AAT4621-1 Evaluation Board Schematic.
Figure 3: AAT4621/AAT4621-1 Evaluation Board PCB Top Side.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
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201944A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • May 15, 2012