AAT2689 Datasheet, PDF (14/20 Pages) Advanced Analogic Technologies – PMIC Solution for 12V Adapter Systems with 2-Output High Performance Step-Down Converters

DATA SHEET
AAT2689
PMIC Solution for 12V Adapter Systems
with 2-Output High Performance Step-Down Converters
Typical output capacitor values for maximum output cur-
rent conditions range from 1μF to 10μF. Applications
utilizing the exceptionally low output noise and optimum
power supply ripple rejection characteristics of channel
2 should use 2.2μF or greater for C_OUT. If desired, C_OUT
may be increased without limit. In low output current
applications where output load is less than 10mA, the
minimum value for C_OUT can be as low as 0.47μF.
Channel 2 Enable Function
The AAT2689 features an LDO regulator enable/disable
function. This pin (EN) is active high and is compatible
with CMOS logic. To assure the LDO regulator will switch
on, the EN turn-on control level must be greater than
1.5V. The LDO regulator will go into disable shutdown
mode when the voltage on the EN pin falls below 0.6V.
If the enable function is not needed in a specific applica-
tion, it may be tied to V_IN to keep the LDO regulator in a
continuously on state. When the LDO regulator is in
shutdown mode, an internal 1.5k resistor is connected
between V_OUT and GND. This is intended to discharge
C_OUT when the LDO regulator is disabled. The internal
1.5khas no adverse effect on device turn-on time.
Channel 2 Short-Circuit Protection
The AAT2689 LDO contains an internal short-circuit pro-
tection circuit that will trigger when the output load cur-
rent exceeds the internal threshold limit. Under short-
circuit conditions, the output of the LDO regulator will be
current limited until the short-circuit condition is removed
from the output or LDO regulator package power dissi-
pation exceeds the device thermal limit.
Channel 2 Thermal Protection
The AAT2689 LDO has an internal thermal protection
circuit which will turn on when the device die tempera-
ture exceeds 150°C. The internal thermal protection
circuit will actively turn off the LDO regulator output
pass device to prevent the possibility of over tempera-
ture damage. The LDO regulator output will remain in a
shutdown state until the internal die temperature falls
back below the 150°C trip point. The combination and
interaction between the short circuit and thermal protec-
tion systems allows the LDO regulator to withstand
indefinite short-circuit conditions without sustaining per-
manent damage.
Channel 2 No-Load Stability
The AAT2689 is designed to maintain output voltage
regulation and stability under operational no load condi-
tions. This is an important characteristic for applications
where the output current may drop to zero.
Channel 2 Reverse Output-to-Input
Voltage Conditions and Protection
Under normal operating conditions, a parasitic diode
exists between the output and input of the LDO regula-
tor. The input voltage should always remain greater than
the output load voltage, maintaining a reverse bias on
the internal parasitic diode. Conditions where V_OUT might
exceed V_IN should be avoided since this would forward
bias the internal parasitic diode and allow excessive cur-
rent flow into the V_OUT pin, possibly damaging the LDO
regulator. In applications where there is a possibility of
V_OUT exceeding V_IN for brief amounts of time during nor-
mal operation, the use of a larger value C_IN capacitor is
highly recommended. A larger value of C_IN with respect
to C_OUT will effect a slower C_IN decay rate during shut-
down, thus preventing V_OUT from exceeding V_IN. In appli-
cations where there is a greater danger of V_OUT exceed-
ing V_IN for extended periods of time, it is recommended
to place a Schottky diode across V_IN to V_OUT (connecting
the cathode to V_IN and anode to V_OUT). The Schottky
diode forward voltage should be less than 0.45V.
Thermal Calculations
There are three types of losses associated with the
AAT2689 step-down converter: switching losses, con-
duction losses, and quiescent current losses. Conduction
losses are associated with the R_DS(ON) characteristics of
the power output switching devices. Switching losses are
dominated by the gate charge of the power output
switching devices. At full load, assuming continuous con-
duction mode (CCM), a simplified form of the synchro-
nous step-down converter and LDO losses is given by:
P_TOTAL
=
I_OUT12 · (R_DS(ON)H · V_OUT1 + R_DS(ON)L · [V_IN1 - V_OUT1])
V_IN1
+ (t_SW · F_S · I_OUT1 + I_Q1) · V_IN1 + (V_IN2 - V_OUT2) · I_OUT2
I_Q1 and I_Q2 are the step-down converter and LDO quies-
cent currents respectively. The term t_SW is used to esti-
mate the full load step-down converter switching losses.
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202035A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • June 8, 2012