AAT2687 Datasheet, PDF (14/20 Pages) Advanced Analogic Technologies – PMIC Solution for 24V Systems with 2 High Performance Step-Down Converters

DATA SHEET
AAT2687
PMIC Solution for 24V Systems
with 2 High Performance Step-Down Converters
Layout Considerations
The suggested PCB layout for the AAT2687 is shown in
Figures 5, 6, 7, and 8. The following guidelines should be
used to help ensure a proper layout.
1. The power input capacitors (C1 and C15) should be
connected as close as possible to high voltage input
pin (IN1) and power ground.
2. C1, L1, D2, C7, C8, and C9 should be place as close
as possible to minimize any parasitic inductance in
the switched current path which generates a large
voltage spike during the switching interval. The con-
nection of inductor to switching node should be as
short as possible.
3. The feedback trace or FB1 pin should be separated
from any power trace and connected as close as pos-
sible to the load point. Sensing along a high-current
load trace will degrade DC load regulation.
4. The resistance of the trace from the load returns to
PGND should be kept to a minimum. This will help to
minimize any error in DC regulation due to differ-
ences in the potential of the internal signal ground
and the power ground.
5. Connect unused signal pins to ground or input to
avoid unwanted noise coupling.
6. The critical small signal components include feed-
back components, and compensation components
should be placed close to the FB1 and COMP1 pins.
The feedback resistors should be located as close as
possible to the FB1 pin with its ground tied straight
to the signal ground plane which is separated from
power ground plane.
7. C4 should be connected close to the RS1 and OS1
pins, while R2 should be connected directly to the
output pin of the inductor. For the best current limit
performance, C4 and R2 should be placed at the bot-
tom layer to avoid noise coupling from the inductor.
8. R7 should be connected directly to the output pin of
inductor L1 to sense precisely its DCR.
9. For good thermal coupling, a 4-layer PCB layout is
recommended and PCB vias are required from the
exposed pad (EP) for the TQFN45-24 paddle to the
middle plans and bottom plane. The EP is internally
connected to IN.
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202033A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • June 8, 2012