AAT1171 Datasheet, PDF (12/22 Pages) Advanced Analogic Technologies – 600mA Voltage-Scaling Step-Down Converter for RF Power Amplifiers with Bypass Switch

DATA SHEET
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
footprint and height. The output voltage of the converter
is regulated to within 0.5% and will settle in less than
30μs (according to WCDMA specifications) in response to
any step change in the DAC input.
Under-voltage lockout, internal compensation, soft-start,
over-current, and over-temperature protection are also
included.
DAC Output Voltage Control
The output voltage is programmed by way of the DAC
input voltage. The DAC to output gain for the AAT1171
is 3.
V_OUT = 3 · V_DAC
The DAC input voltage range is 0.2V to 1.2V, which cor-
responds to an output voltage range of 0.6V to 3.6V (see
Figure 1). For a 1.3V DAC level, the bypass switch is
activated and the output voltage level is equivalent to
the input voltage minus the bypass MOSFET (R_DS(ON)(bp))
drop.
Bypass Mode
In bypass mode, the AAT1171 bypasses the output
inductor, connecting the input directly to the output
through a low R_DS(ON) 85mΩ MOSFET. Bypass mode is
initiated by applying 1.3V to the DAC input or by apply-
ing a logic high to the bypass input. When not activated,
a logic level low must be applied to the bypass input pin.
The bypass MOSFET current is limited to 600mA.
LL/PWM Control
Two control modes are available with the AAT1171: LL
mode and PWM mode. PWM mode maintains a fixed
switching frequency regardless of load. The fixed switch-
ing frequency gives the advantage of lower output ripple
and simplified output and input noise filtering. PWM
mode also provides a faster output voltage response to
changes in the DAC voltage.
In LL mode, the converter transitions to a variable
switching frequency as the load decreases below 100mA.
Above 100mA, where switching losses no longer domi-
nate, the switching frequency is fixed. The LL mode’s
effect on the DAC to output voltage response time is
most notable when transitioning from a high output volt-
age to a low voltage. When the converter is in PWM
mode, the inductor current can be reversed and the out-
put voltage actively discharged by the synchronous
MOSFET. While in LL mode, the output voltage is dis-
charged by the load only, resulting in a slower response
to a DAC transition from a high to a low voltage.
For PWM mode, apply a logic level high to the MODE/
SYNC pin; for LL mode, apply a logic level low to the
MODE/SYNC pin.
Soft Start/Enable
The AAT1171 soft-start control prevents output voltage
overshoot and limits inrush current when either the input
power or the enable input is applied. When pulled low,
the enable input forces the converter into a low-power,
non-switching state with less than 1μA bias current.
V _IN
4V
3.6V
3V
2V
1V
0.6V
0.2V
1V 1.2V 1.3V
DAC Output
Figure 1: V_OUT vs. V_DAC.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
12
201999B • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • March 20, 2013