AAT1153 Datasheet, PDF (12/19 Pages) Advanced Analogic Technologies – 2A Step-Down Converter

Always consider the losses associated with the DCR and
its effect on the total converter efficiency when selecting
an inductor. For optimum voltage-positioning load tran-
sients, choose an inductor with DC series resistance in
the 20m to 100m range. For higher efficiency at
heavy loads (above 200mA), or minimal load regulation
(but some transient overshoot), the resistance should be
kept below 100m. The DC current rating of the induc-
tor should be at least equal to the maximum load current
plus half the ripple current to prevent core saturation (2A
+ 600mA). Table 2 lists some typical surface mount
inductors that meet target applications for the AAT1153.
For example, the 2.2μH CDRH5D16-2R2 inductor select-
ed from Sumida has a 28.7mΩ DCR and a 3.0ADC cur-
rent rating. At full load, the inductor DC loss is 57mW
which gives a 1.6% loss in efficiency for a 1200mA, 1.8V
output.
Slope Compensation
The AAT1153 step-down converter uses peak current
mode control with slope compensation for stability when
duty cycles are greater than 50%. The slope compensa-
tion is set to maintain stability with lower value inductors
which provide better overall efficiency. The output induc-
tor value must be selected so the inductor current down
slope meets the internal slope compensation require-
ments. As an example, the value of the slope compensa-
tion is set to 1A/μs which is large enough to guarantee
stability when using a 2.2μH inductor for all output volt-
age levels from 0.6V to 3.3V.
The worst case external current slope (m) using the
2.2μH inductor is when V_OUT = 3.3V and is:
m
=
V_OUT
L
=
3.3
2.2
=
1.5A/µs
To keep the power supply stable when the duty cycle is
above 50%, the internal slope compensation (mA)
should be:
1
m_a ≥ ₂ · m = 0.75A/µs
Therefore, to guarantee current loop stability, the slope
of the compensation ramp must be greater than one-half
of the down slope of the current waveform. So the inter-
DATA SHEET
AAT1153
2A Step-Down Converter
nal slope compensated value of 1A/μs will guarantee
stability using a 2.2μH inductor value for all output volt-
ages from 0.6V to 3.3V.
Input Capacitor Selection
The input capacitor reduces the surge current drawn
from the input and switching noise from the device. The
input capacitor impedance at the switching frequency
should be less than the input source impedance to pre-
vent high frequency switching current passing to the
input. The calculated value varies with input voltage and
is a maximum when V_IN is double the output voltage.
V_O
V_IN
·
⎛⎝_{1 -}
V_O ⎞
V_IN ⎠
C_IN =
⎛ V_PP
⎝ I_O
- ESR^⎞⎠ · f_S
1
C_IN(MIN) = _{⎛ VPP}
⎝ I_O
- ESR^⎞⎠ · 4 · f_S
A low ESR input capacitor sized for maximum RMS cur-
rent must be used. Ceramic capacitors with X5R or X7R
dielectrics are highly recommended because of their low
ESR and small temperature coefficients. A 22μF ceram-
ic capacitor for most applications is sufficient. A large
value may be used for improved input voltage filtering.
The maximum input capacitor RMS current is:
I_RMS = I_O ·
V_O
V_IN
·
⎛⎝_{1 -}
V_O ⎞
V_IN ⎠
The input capacitor RMS ripple current varies with the
input and output voltage and will always be less than or
equal to half of the total DC load current.
I = _RMS(MAX)
1
2
· I_O
To minimize stray inductance, the capacitor should be
placed as closely as possible to the IC. This keeps the
high frequency content of the input current localized,
minimizing EMI and input voltage ripple. The proper
placement of the input capacitor (C1) can be seen in the
evaluation board layout in Figures 2 and 3.
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