AAT1401 Datasheet, PDF (10/19 Pages) List of Unclassifed Manufacturers – FOUR-CHANNEL DIGITAL STILL CAMERA POWER SUPPLY

DATA SHEET
AAT1401
Serial LED Driver with Filtered PWM and 32-Step S2C Dimming Control
Over-Voltage Protection
Over-voltage protection prevents damage to the AAT1401's
LX pin during open-circuit or high output voltage condi-
tions. An over-voltage event is defined as a condition
where the voltage on the OVP pin exceeds the over-volt-
age protection threshold (V_OVP-T). When V_OVP has reached
the threshold limit, the converter stops switching and the
output voltage decays. Switching resumes when the lower
hysteresis limit of V_OVP is reached, thereby maintaining an
average output voltage between the upper and lower OVP
thresholds.
LED Current Setting
The maximum LED current is determined by the R_SET
resistor value. With a fixed 1.2V voltage on R_SET, the LED
maximum current is a linear ratio to the current flowing
through R_SET.
I_LED =
V_SET
R_SET
· 258
The LED dimming is controlled via one of two options,
either using the 32-step S²Cwire single-wire interface via
the EN/SET pin or PWM control with varied duty cycle up
to 100kHz frequency. 32 S²Cwire rising-edge steps set the
LED current from 100% to 2% percentage of the maxi-
mum LED current value when PWM control is disabled by
pulling the PWM pin high. S²Cwire can also be used to set
maximum LED current along with a PWM signal to dim the
LED lighting from 100% to 1% of duty cycle.
S²Cwire™ Serial Interface
The LED current magnitude can be controlled by the EN/
SET pin using the S²Cwire interface. The interface records
rising edges of the EN/SET pin and decodes them into 32
individual current level settings. Code 1 is full scale
(maximum LED current), and Code 32 is 2% of the full
scale. The modulo 32 interface wraps states back to state
1 after the 32nd clock. The counter can be clocked at
speeds up to 1MHz, so intermediate states are not visi-
ble. The first rising edge of EN/SET enables the IC and
initially sets the output LED current to full scale after
500µs t_LAT. Once the final clock cycle is input for the
desired brightness level, the EN/SET pin should be held
high to maintain the device output current at the pro-
grammed level. The device is disabled 500μs after the
EN/SET pin enters a logic low state. The EN/SET timing
is designed to accommodate a wide range of data rates
from 20kHz to 1MHz.
After the first rising edge of EN/SET, the boost converter
is enabled and reaches full capacity after the soft-start
time. Exact counts of clock pulses for the desired current
level should be entered on the EN/SET pin with a single
burst of clocks. The counter refreshes each time a new
clock input to the EN/SET pin is detected. A constant cur-
rent is maintained as long as EN/SET remains in a logic
high state. To save power, the boost converter is switched
off after EN/SET has remained in the low state for at least
the t_OFF timeout period as shown in Figure 1.
S²Cwire Serial Interface Timing
EN/SET
T_HI
T_LO
T _LAT
1
2
n-1
n ≤ 32
TOFF
Data Reg
0
n
0
Figure 1: S²Cwire Timing Diagram.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
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202113A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • June 27, 2012