ST7712 Datasheet, PDF (61/113 Pages) Sitronix Technology Co., Ltd. – 262K Color Single-Chip TFT Controller/Driver

ST7712
EQPW[1:0]: Decide the source output voltage in the equalized area.
EQPW[1:0]
Positive Polarity Negative Polarity
0
0
V0
V63
0
1
V63
V0
1
0
GND
GND
1
1
Hi-Z
Hi-Z
DIV[2:0]: Set the division ratio of clocks for internal operations. Internal operations are in synchronization with the clock,
the frequency of which is divided according to the DIV[2:0] setting. Frame frequency can be adjusted in combination with
the adjustment of 1H period (RTN [3:0]). When changing the number of drive raster-rows, adjust the frame frequency too.
For details, see “Frame Frequency Adjustment Function”.
DIV2
0
0
0
0
1
1
1
1
DIV1 DIV0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
Division
Ratio
1
2
4
8
3
5
6
7
Internal Operating Clock Frequency
fosc/1
fosc/2
fosc/4
fosc/8
fosc/3
fosc/5
fosc/6
fosc/7
RTN[3:0]: Set the clock cycles per raster-row
RTN3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
RTN2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
RTN1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
RTN0
0
1
0
1
0
1
0
1
0
1
0
1
0:
1
0
1
clock cycles per raster-row
16 clocks
17 clocks
18 clocks
19 clocks
20 clocks
21 clocks
22 clocks
23 clocks
24 clocks
25 clocks
26 clocks
27 clocks
28 clocks
29 clocks
30 clocks
31 clocks
Ver 2.3
61/113
2007/07/19