ST7713 Datasheet, PDF (57/159 Pages) Sitronix Technology Co., Ltd. – 262K Color Single-Chip TFT Controller/Driver

ST7713
9.9.6 RGB Interface Timing Diagram
9.9.6.1 General Timings for RGB I/F
Fig. 9.9.6 General timing of RGB interface
Table 9.9.6.1 General Timing for RGB I/F
Item
Symbol
Condition
Specification
Min
Type.
Max
Pixel low pulse width
TPCLKLT
15
Pixel high pulse width
TPCLKHT
15
Vertical Sync. set-up time
TVSST
15
Vertical Sync. hold time
TVSSHT
15
Horizontal Sync. set-up time
THSST
15
Horizontal Sync. hold time
TVSSHT
15
Data Enable set-up time
TDEST
15
Data Enable hold time
TDEHT
15
Data set-up time
TDST
15
Data hold time
TDHT
15
Note 1: VDDI=1.6 to 3.3V, VDD=2.5 to 3.3V, AGND=DGND=0V, Ta=-30 to 70 ℃ (to +85℃ no damage)
Note 2: The input signal rise time and fall time (tr, tf) is specified at 15 ns or less.
Note 3. Data lines can be set to “High” or “Low” during blanking time – Don’t care.
Note 4. Logic high and low levels are specified as 30% and 70% of VDDI for Input signals.
Note 5. HP is multiples of eight PCLK.
Unit
ns
ns
ns
ns
Ver 1.6
57
2008-05