ST7628 Datasheet, PDF (29/213 Pages) Sitronix Technology Co., Ltd. – 65K Color Dot Matrix LCD Controller/Driver

ST7628
7.2 ACCESS TO DDRAM AND INTERNAL REGISTERS
ST7628 realizes high-speed data transfer because the access from MPU is a sort of pipeline processing done via the bus
holder attached to the internal, requiring the cycle time alone without needing the wait time.
For example, when MPU writes data to the DDRAM, the data is once held by the bus holder and then written to the
DDRAM before the succeeding write cycle is started. When MPU reads data from the DDRAM, the first read cycle is
dummy and the bus holder holds the data read in the dummy cycle, and then it read from the bus holder to the system bus
in the succeeding read cycle. Figure 7.2 illustrates these relations.
In 80-series interface mode:
Read
Operation
MPU signal
A0
/WR
/RD
DATA
Internal signals
/WR
/RD
INTERNAL LATCH
ADDRESS COUNTER
N
Dummy D (N ) D (N +1)
N
D(N)
D(N) D(N+1) D(N+2)
D(N+1) D(N+2) D(N+3)
Figure 7.2
Ver 1.4
29/213
2008/08