ST8024 Datasheet, PDF (10/28 Pages) STMicroelectronics – SMARTCARD INTERFACE

ST8024
7.2.2 Relationship between the display data and LCD drive output Pins
(Segment Mode)
4-bit Parallel Input Mode
MD L/R EIO1
EI02
DATA
INPUT
DI0
H L Output Input
Dl1
DI2
DI3
DI0
H
H
Input Output
Dl1
DI2
DI3
60 CLOCK
Y1
Y2
Y3
Y4
Y240
Y239
Y238
Y237
59 CLOCK
Y5
Y6
Y7
Y8
Y236
Y235
Y234
Y233
NUMBER OF CLOCKS
58 CLOCK … 3 CLOCK
Y9
… Y229
Y10
… Y230
Y11
… Y231
Y12
… Y232
Y232
…
Y12
Y231
…
Y11
Y230
…
Y10
Y229
…
Y9
2 CLOCK
Y233
Y234
Y235
Y236
Y8
Y7
Y6
Y5
1 CLOCK
Y237
Y238
Y239
Y240
Y4
Y3
Y2
Y1
8-bit Parallel Input Mode
MD L/R EIO1
EI02
DATA
INPUT
DI0
Dl1
DI2
L L Output Input
DI3
DI4
DI5
DI6
DI7
DI0
Dl1
DI2
L
H
Input Output
DI3
DI4
Dl5
DI6
DI7
30 CLOCK
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y240
Y239
Y238
Y237
Y236
Y235
Y234
Y233
29 CLOCK
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y232
Y231
Y230
Y229
Y228
Y227
Y226
Y225
NUMBER OF CLOCKS
28 CLOCK … 3 CLOCK
Y17
… Y217
Y18
… Y218
Y19
… Y219
Y20
… Y220
Y21
Y221
Y22
Y222
Y23
Y223
Y24
Y224
Y224
…
Y24
Y223
…
Y23
Y222
…
Y22
Y221
…
Y21
Y220
…
Y20
Y219
…
Y19
Y218
…
Y18
Y217
…
Y17
2 CLOCK
Y225
Y226
Y227
Y228
Y229
Y230
Y231
Y232
Y16
Y15
Y14
Y13
Y12
Y11
Y10
Y9
1 CLOCK
Y233
Y234
Y235
Y236
Y237
Y238
Y239
Y240
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
(Common Mode)
MD
L/R
DATA TRANSFER DIRECTION
L
L
Y240 Y1
(Single)
H
Y1 Y240
H
L
Y240 Y121
Y120 Y1
(Dual)
H
Y1 Y120
Y121 Y240
NOTES:
L: LGND (0 V), H: VDD (+2.5 to +5.5 V), X: Don't care
"Don't care" should be fixed to "H" or "L", avoiding floating.
EIO1
Output
Input
Output
Input
EI02
Input
Output
Input
Output
DI7
X
X
Input
Input
Ver 2.1
Page 10/28
2009/08/19