PS25A Datasheet, PDF (3/11 Pages) Silicon Touch Technology Inc. – Over/Under-voltage protection and lock out

PS25A
Block Diagram
VS12A
R1
R2
Vref
R3
Vref
12 UV
12 OV
VS12B
R1
R2
Vref
R3
Vref
12 UV
12 OV
VS12C
R1
R2
Vref
R3
Vref
12 UV
12 OV
delay
14uS
38mS
De-bounce
SQ
R
delay
H : 4mS
L : 4.5uS
1MΩ
FPO/
VCCI
Vref
VCC
30KΩ
2KΩ
PSON/
4.5V
90KΩ
delay
H : 75mS
L : 4.5uS
PGI
Selection
PGI
1.25V
IS12A
IS12B
IS12C
Step Down
to near 2.5V
Iref X 8
Step Down
to near 2.5V
Iref X 8
Step Down
to near 2.5V
Iref X 8
VCCI
12 OC
delay
3mS
delay
VCCI
H : 20mS
L : 4.5uS
12 OC
VCCI
12 OC
delay
73uS
De-bounce
delay
H : 300mS
L : 4.5uS
3mS
VCCI
1MΩ
1.25V
Power On
Reset
POR
Constant Current
Source Iref
PGO
Pext
RI
Internal
Power
VCCI = 4V
Band-Gap
Reference
Vref
1.25V
Clock
Generator
VCC VCC
CLK
GND
3-Channel Secondary Monitoring IC Version：A.005
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