PS257 Datasheet, PDF (3/14 Pages) Silicon Touch Technology Inc. – Fault-protection output with open drain output stage

PS257
Block Diagram
VS12A
VS12B
VS5
VS33
IS12A
IS12B
IS5
IS33
R1
R2
Vref
R3
Vref
12 UV
12 OV
R1
R2
Vref
R3
Vref
12 UV
12 OV
R4
R5
Vref
R6
Vref
5 UV
5 OV
delay
22uS
38mS
De-bounce
SQ
R
delay
H : 4mS
L : 4.5uS
1MΩ
VCCI
1MΩ
FPO/
LED
VCCI
Vref
VCC
30KΩ
2KΩ
PSON/
4.5V
90KΩ
delay
H : 75mS
L : 4.5uS
PGI
Selection
PGI
1.2V
R7
R8
Vref
R9
Vref
3.3 UV
3.3 OV
Step Down
to near 2.5V
Iref X 8
Step Down
to near 2.5V
Iref X 8
Step Down
to near 2.5V
Iref X 8
Step Down
to near 2.5V
Iref X 8
VCCI
12 OC
delay
VCCI
12 OC
56uS
delay
VCCI
H : 20mS
5 OC
L : 4.5uS
73uS
De-bounce
delay
H : 300mS
L : 4.5uS
delay
56uS
Power On
Reset
POR
-12 OV
-12 UV
Internal
Power
VCCI = 4V
VCCI
3.3 OC
Band-Gap
Reference
Vref
1.25V
Clock
Generator
OT
CLK
VCC
VCCI
1MΩ
-12 V
block
Fan
block
VCC
GND
PGO
NVS12
VTL
VTS
FB
FDRV
4-Channel Secondary Monitoring IC Version： PRE.005
PAGE 2
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