SZA-2044 Datasheet, PDF (2/8 Pages) List of Unclassifed Manufacturers – 2.0-2.7 GHz 5V 1W Power Amplifier

SZA-2044 2.0-2.7GHz 5V Power Amp
Pin Out Description
Pin # Function
Description
1,2,4,5,
7,9,11,
13,
15,17,19
N/C
These are unused pins and not wired inside the package. They may be grounded or connected to adjacent
pins.
VPC1 is the bias control pin for the stage 1 active bias circuit. An external series resistor is required for proper
6
VPC1
setting of bias levels. Refer to the evaluation board schematic for resistor value. To prevent potential damage,
do not apply voltage to this pin that is +1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply
current capability is less than 10 mA.
VPC2 is the bias control pin for the stage 2 active bias circuit. An external series resistor is required for proper
8
VPC2
setting of bias levels. Refer to the evaluation board schematic for resistor value. To prevent potential damage,
do not apply voltage to this pin that is +1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply
current capability is less than 10 mA.
10
Vdet Output power detector voltage. Load with > 10K ohms for best performance
3
RFIN RF input pin. This is DC grounded internal to the IC. Do not apply voltage to this pin.
12,14 RFOUT RF output pin. This is also another connection to the 2nd stage collector.
16
VC2 2nd stage collector bias pin. Apply 3.0 to 5.0V to this pin.
18
VC1 1st stage collector bias pin. Apply 3.0 to 5.0V to this pin.
20
Vbias Active bias network VCC. Apply 3.0 to 5.0V to this pin.
EPAD
Exposed area on the bottom side of the package needs to be soldered to the ground plane of the board for
Gnd optimum thermal and RF performance. Several vias should be located under the EPAD as shown in the rec-
ommended land pattern (page 5).
Simplified Device Schematic
Pin Pin
Pin Pin
Pin
20 6
18 8
16
Stage 1
Bias
Stage 2
Bias
Pin 3
Pin 12, 14
EPAD Pin
10
EPAD
Caution: ESD Sensitive
Appropriate precaution in handling, packaging
and testing devices must be observed.
Absolute Maximum Ratings
Parameters
Value
Unit
VC2 Collector Bias Current (I_VC2 )
VC1 Collector Bias Current (I_VC1 )
Device Voltage (V _D)
Power Dissipation
500
mA
150
mA
7.0
V
3
W
Operating Lead Temperature (T_L)
Max RF Input Power for 50 ohm output
load
-40 to +85
15
ºC
dBm
Max RF Input Power for 10:1 VSWR RF
out load
8
dBm
Storage Temperature Range
-40 to +150 ºC
Operating Junction Temperature (T_J)
ESD Human Body Model (Class 1C)
+150
ºC
500
V
Operation of this device beyond any one of these limits may
cause permanent damage. For reliable continuous operation
the device voltage and current must not exceed the maximum
operating values specified in the table on page one.
Bias conditions should also satisfy the following expression:
I_DV _D < ( T_J - T_L) / R_TH’ j-l
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC
2
http://www.sirenza.com
EDS-103612 Rev E